ZHCSD05 November   2014 OPA4277-EP

PRODUCTION DATA.  

  1. 特性
  2. 应用范围
  3. 说明
  4. 修订历史记录
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Offset Voltage Adjustment
        2. 8.2.2.2 Input Protection
        3. 8.2.2.3 Input Bias Current Cancellation
      3. 8.2.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 商标
    2. 11.2 静电放电警告
    3. 11.3 术语表
  12. 12机械封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The OPA4277 is unity-gain stable and free from unexpected output phase reversal, making it easy to use in a wide range of applications. Applications with noisy or high-impedance power supplies may require decoupling capacitors close to the device pins. In most cases, 0.1-μF capacitors are adequate.

8.2 Typical Application

OPA4277_offset_voltage_trim_circuit_sbos714.gifFigure 22. OPA4277 Offset Voltage Trim Circuit

8.2.1 Design Requirements

For the thermocouple low-offset, low-drift loop measurement with diode cold junction compensation (see Figure 25), Table 1 lists the design parameters needed with gain = 50.

Equation 1. eq_g_bos714.gif

Table 1. Design Parameters

DESIGN PARAMETER EXAMPLE VALUE
RF 10 kΩ
R 412 Ω

8.2.2 Detailed Design Procedure

8.2.2.1 Offset Voltage Adjustment

The OPA27 is laser-trimmed for very-low offset voltage and drift so most circuits do not require external adjustment. However, offset voltage trim connections are provided on pins 1 and 8. The user can adjust offset voltage by connecting a potentiometer as shown in Figure 22. Only use this adjustment to null the offset of the operational amplifier. This adjustment should not be used to compensate for offsets created elsewhere in a system because this can introduce additional temperature drift.

8.2.2.2 Input Protection

The inputs of the OPA4277 are protected with 1-kΩ series input resistors and diode clamps. The inputs can withstand ±30-V differential inputs without damage. The protection diodes conduct current when the inputs are overdriven. This may disturb the slewing behavior of unity-gain follower applications, but will not damage the operational amplifier.

8.2.2.3 Input Bias Current Cancellation

The input stage base current of the OPA4277 is internally compensated with an equal and opposite cancellation circuit. The resulting input bias current is the difference between the input stage base current and the cancellation current. This residual input bias current can be positive or negative.

When the bias current is canceled in this manner, the input bias current and input offset current are approximately the same magnitude. As a result, it is not necessary to use a bias current cancellation resistor, as is often done with other operational amplifiers (see Figure 23). A resistor added to cancel input bias current errors may actually increase offset voltage and noise.

input_bias_current_cancellation_sbos714.gifFigure 23. Input Bias Current Cancellation
load_cell_amplifier_sbos714.gifFigure 24. Load Cell Amplifier
thermocouple_low_offset_low_drift_sbos714.gifFigure 25. Thermocouple Low Offset, Low Drift Loop Measurement With Diode Cold Junction Compensation

8.2.3 Application Curve

At TJ = 25°C, VS = ±15 V, and RL = 2 kΩ, unless otherwise noted.

graph9_sbos714.gif
Figure 26. Warm-Up Offset Voltage Drift