ZHCSAU5E September 2012 – September 2018 MSP430F6745 , MSP430F6746 , MSP430F6747 , MSP430F6748 , MSP430F6749 , MSP430F6765 , MSP430F6766 , MSP430F6767 , MSP430F6768 , MSP430F6769 , MSP430F6775 , MSP430F6776 , MSP430F6777 , MSP430F6778 , MSP430F6779
Up to eleven 8-bit I/O ports are implemented. For 128-pin options, ports P1 to P10 are complete, and port P11 is 6 bits wide. For 100-pin options, ports P1 to P7 are complete, port P8 is 2 bits wide, and ports P9, P10, and P11 are completely removed. Port PJ contains four individual I/O pins, common to all devices. All I/O bits are individually programmable.