SNOSA56I February   2003  – September 2015 LMV7271 , LMV7272 , LMV7275

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  1.8-V Electrical Characteristics
    6. 6.6  1.8-V AC Electrical Characteristics
    7. 6.7  2.7-V Electrical Characteristics
    8. 6.8  2.7-V AC Electrical Characteristics
    9. 6.9  5-V Electrical Characteristics
    10. 6.10 5-V AC Electrical Characteristics
    11. 6.11 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Rail-to-Rail Input Stage
      2. 7.3.2 Output Stage, LMV7271 and LMV7272
      3. 7.3.3 Output Stage, LMV7275
    4. 7.4 Device Functional Modes
      1. 7.4.1 Capacitive and Resistive Loads
      2. 7.4.2 Noise
      3. 7.4.3 Hysteresis
        1. 7.4.3.1 Noninverting Comparator With Hysteresis
        2. 7.4.3.2 Inverting Comparator With Hysteresis
      4. 7.4.4 Zero Crossing Detector
        1. 7.4.4.1 Zero Crossing Detector With Hysteresis
      5. 7.4.5 Threshold Detector
      6. 7.4.6 Universal Logic Level Shifter (LMV7275 only)
      7. 7.4.7 OR'ING the Output (LMV7275 only)
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Square Wave Oscillator
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Positive Peak Detector
      3. 8.2.3 Negative Peak Detector
      4. 8.2.4 Window Detector
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Circuit Techniques for Avoiding Oscillations in Comparator Applications
      2. 10.1.2 DSBGA Light Sensitivity
      3. 10.1.3 DSBGA Mounting
      4. 10.1.4 LMV7272 DSBGA to DIP Conversion Board
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The LMV727x devices are single-supply comparators with 880 ns of propagation delay and only 12 µA of supply current.

8.2 Typical Applications

8.2.1 Square Wave Oscillator

LMV7271 LMV7272 LMV7275 20064056.gifFigure 35. Square Wave Oscillator Application

8.2.1.1 Design Requirements

A typical application for a comparator is as a square wave oscillator. Figure 35 generates a square wave whose period is set by the RC time constant of the capacitor C1and resistor R4. The maximum frequency is limited by the large signal propagation delay of the comparator, and by the capacitive loading at the output, which limits the output slew rate.

8.2.1.2 Detailed Design Procedure

To analyze the circuit, consider it when the output is high. That implies that the inverted input (VC) is lower than the noninverting input (VA).

LMV7271 LMV7272 LMV7275 20064057.pngFigure 36. Squarewave Oscillator Timing Thresholds

This causes the C1 to get charged through R4, and the voltage VC increases till it is equal to the noninverting input. The value of VA at this point is

Equation 8. LMV7271 LMV7272 LMV7275 20064058.gif

If R1 = R2 = R3, then VA1 = 2VCC/3

At this point the comparator switches pulling down the output to the negative rail. The value of VA at this point is

Equation 9. LMV7271 LMV7272 LMV7275 20064059.gif

If R1 = R2 = R3, then VA2 = VCC/3

The capacitor C1 now discharges through R4, and the voltage VC decreases till it is equal to VA2, at which point the comparator switches again, bringing it back to the initial stage. The time period is equal to twice the time it takes to discharge C1 from 2VCC/3 to VCC/3, which is given by R4C1.ln2. Hence the formula for the frequency is:

F = 1/(2·R4·C1·ln2)

8.2.1.3 Application Curve

Figure Figure 37 shows the simulated results of an oscillator using the following values:

  1. R1 = R2 = R3 = R4 = 100 kΩ
  2. C1 = 750 pF, CL = 20 pF
  3. V+ = 5 V, V- = GND
  4. CSTRAY (not shown) from Va to GND = 10 pF

LMV7271 LMV7272 LMV7275 OSC_RSLT_GRAPH.pngFigure 37. Square Wave Oscillator Output Waveforms

8.2.2 Positive Peak Detector

LMV7271 LMV7272 LMV7275 20064054.gifFigure 38. Positive Peak Detector

The positive peak detect circuit is basically a comparator operated in a unity gain follower configuration, with a capacitor as a load to store the highest voltage. A diode is added at the output to prevent the capacitor from discharging through the pullup resistor. When the input VIN increases, the inverting input of the comparator follows it, thus charging the capacitor. When the input voltage decreases, the cap discharges through the 1-MΩ resistor.

The decay time can be modified by changing R2. The output should be accessed through a high-impedance input follower circuit to prevent loading. Upper output swing headroom is determined by the forward voltage of the diode (VMAX = VCC – VF). A Shottky signal diode can be used to reduce the required headroom to around 300 mV.

This circuit can use any of the LMV727x devices, but R1 is not required for the LMV7271 or LMV7272.

8.2.3 Negative Peak Detector

LMV7271 LMV7272 LMV7275 20064055.gifFigure 39. Negative Peak Detector (LMV7275 Only)

The Negative Peak Detector circuit will store the peak negative voltage below ground ( 0 V to –VCC). For the negative detector, the LMV7275 must be used because the output transistor acts as a low-impedance current sink. Because there is no pullup resistor, the only discharge path will be the 1-MΩ resistor and any load impedance used. Decay time is changed by varying the 1-MΩ resistor.

NOTE

The negative peak detector does require a negative supply voltage! +VCC can be grounded to save dynamic range because the output does not swing above ground

8.2.4 Window Detector

LMV7271 LMV7272 LMV7275 20201347.gifFigure 40. Window Detector

A window detector monitors the input signal to determine if it falls between two voltage levels. Both outputs are true (high) when VREF1 < VIN < VREF2

LMV7271 LMV7272 LMV7275 20201348.gifFigure 41. Window Detector Output Signal

The comparator outputs A and B are high only when VREF1 < VIN < VREF2, or within the window, where these are defined as:

Equation 10. VREF1 = R3 / R1 + R2 + R3) × V+
Equation 11. VREF2 = R2 + R3) / R1 + R2 + R3) × V+

To determine if the input signal falls outside of the two voltage levels, both inputs on each comparators can be reversed to invert the logic.

The LMV7275 with an open-drain output should be used if the outputs are to be tied together for a common logic output.

Other names for window detectors are: threshold detector, level detector, and amplitude trigger or detector.