SNOS018H August   1999  – December 2014 LMV331-N , LMV339-N , LMV393-N

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 2.7-V DC Electrical Characteristics
    6. 6.6 2.7-V AC Electrical Characteristics
    7. 6.7 5-V DC Electrical Characteristics
    8. 6.8 5-V AC Electrical Characteristics
    9. 6.9 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Open Collector Output
      2. 7.3.2 Ground Sensing Input
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Basic Comparator
      2. 8.1.2 Comparator With Hysteresis
        1. 8.1.2.1 Inverting Comparator With Hysteresis
          1. 8.1.2.1.1 Non-inverting Comparator With Hysteresis
      3. 8.1.3 ORing the Output
      4. 8.1.4 Driving CMOS and TTL
      5. 8.1.5 AND Gates
      6. 8.1.6 OR Gates
      7. 8.1.7 Large Fan-In Gate
    2. 8.2 Typical Applications
      1. 8.2.1 Squarewave Oscillator
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Crystal Controlled Oscillator
      3. 8.2.3 Pulse Generator With Variable Duty Cycle
      4. 8.2.4 Positive Peak Detector
      5. 8.2.5 Negative Peak Detector
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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10 Layout

10.1 Layout Guidelines

Comparators are very sensitive to input noise. For best results, the following layout guidelines should be maintained:

  • Use a printed circuit board (PCB) with a good, unbroken low-inductance ground plane. Proper grounding (use of ground plane) helps maintain specified performance of the comparator
  • Connect low-ESR, 0.1-μF ceramic bypass capacitors between each supply pin and ground, placed as close to the device as possible. A single bypass capacitor from V+ to ground is applicable for single supply applications.
  • Separate grounding for analog and digital portions of circuitry is one of the simplest and most-effective methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes. A ground plane helps distribute heat and reduces EMI noise pickup. Make sure to physically separate digital and analog grounds paying attention to the flow of the ground current. For more detailed information refer to SLOA089, Circuit Board Layout Techniques.
  • In order to reduce parasitic coupling, run the input traces as far away from the supply or output traces as possible. If it is not possible to keep them separate, it is much better to cross the sensitive trace perpendicular as opposed to in parallel with the noisy trace.
  • Place the external components as close to the device as possible, as shown in Layout Example.
  • Keep the length of input traces as short as possible. Always remember that the input traces are the most sensitive part of the circuit.
  • For slow-moving input signals, take care to prevent parasitic feedback. A small capacitor (1000 pF or less) placed between the inputs can help eliminate oscillations in the transition region. This capacitor causes some degradation to propagation delay when the impedance is low. Run the topside ground plane between the output and inputs.

10.2 Layout Example

layout_example_bos589.gifFigure 27. Comparator Board Layout