ZHCSH72J september   2011  – may 2023 LMK00301

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Revision History
  6. Device Comparison
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  9. Parameter Measurement Information
    1. 8.1 Differential Voltage Measurement Terminology
  10. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 VCC and VCCO Power Supplies
    4. 9.4 Device Functional Modes
      1. 9.4.1 Clock Inputs
      2. 9.4.2 Clock Outputs
        1. 9.4.2.1 Reference Output
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
        1. 10.2.1.1 Driving the Clock Inputs
        2. 10.2.1.2 Crystal Interface
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Termination and Use of Clock Drivers
          1. 10.2.2.1.1 Termination for DC Coupled Differential Operation
          2. 10.2.2.1.2 Termination for AC Coupled Differential Operation
          3. 10.2.2.1.3 Termination for Single-Ended Operation
      3. 10.2.3 Application Curves
  12. 11Power Supply Recommendations
    1. 11.1 Power Supply Sequencing
    2. 11.2 Current Consumption and Power Dissipation Calculations
      1. 11.2.1 Power Dissipation Example #1: Separate VCC and VCCO Supplies with Unused Outputs
      2. 11.2.2 Power Dissipation Example #2: Worst-Case Dissipation
    3. 11.3 Power Supply Bypassing
      1. 11.3.1 Power Supply Ripple Rejection
    4. 11.4 Thermal Management
  13. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  14. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 接收文档更新通知
    3. 13.3 支持资源
    4. 13.4 Trademarks
    5. 13.5 静电放电警告
    6. 13.6 术语表
  15. 14Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Revision History

Changes from Revision I (December 2017) to Revision J (May 2023)

  • 更新了整个文档中的表格、图和交叉参考的编号格式Go
  • 添加了器件功能模式应用信息典型应用布局 部分Go
  • 特性 部分中添加了 LVPECL、LVDS、HCSL 和 LVCMOS 的频率范围Go
  • 应用 添加了 PCIe 5.0 和 6.0Go
  • 封装信息 表中添加了 LMK00301AGo
  • Added PCIe 5.0 and PCIe 6.0 additive jitter specifications in Electrical Characteristics.Go
  • Changed HCSL Maximum Output Frequency Range to 800 MHz Electrical Characteristics.Go
  • Added test conditions for HCSL Duty Cycle and ΔVCROSS in Electrical Characteristics.Go
  • Updated typical plots for HCSL, LVDS and LVPECL Phase Noise at 100 MHz in Typical Characteristics section. Go
  • Added typical plots for HCSL Output Swing (VOD) vs Frequency in Typical Characteristics section.Go
  • Moved Clock Input and Clock Outputs to Device Functional Modes section.Go
  • Added application use case in Application Information Go
  • Added PCI Express Application example in Typical Application section.Go
  • Added Driving the Clock Input and Crystal Interface topics in Design Requirement section.Go
  • Moved Termination and Use of Clock Drivers in Detailed Design Procedure section.Go
  • Added HCSL Phase Noise plot in Application Performance Plots section.Go
  • Added layout guidelines in Layout Guidelines section.Go
  • Added PCB layout example for LMK00301 in Layout Example section.Go

Changes from Revision H (March 2016) to Revision I (December 2017)

  • 添加并更新了以下部分的信息:应用说明电气特性:电流消耗电气特性:HCSL 输出电源时序 Go
  • 添加了 LMK00301A 可订购器件Go
  • 应用 添加了 PCIe 4.0Go
  • 说明 中添加了 LMK00301 与 LMK00301A 之间的区别Go
  • Added Device Comparison Table Go
  • Added data for Icc and Icco of LMK00301A LVDS Driver in Electrical Characteristics: Current Consumption Go
  • Added PCIe 4.0 Additive Jitter Spec in Electrical Characteristics: HCSL Outputs Go
  • Added note about specs for LMK00301 and LMK00301A in footnote (2) of Electrical Characteristics Go
  • Added short paragraph about LMK00301A in Power Supply Sequencing Go

Changes from Revision G (May 2013) to Revision H (March 2016)

  • 向文档标题添加了“超低附加抖动“Go
  • 添加、更新或重命名了以下各个部分:规格详细说明应用和实施电源相关建议器件和文档支持机械、封装和订购信息 Go
  • Changed Cin (typ) from 1 pF to 4 pF (based on updated test method) in Electrical Characteristics: Crystal Interface. Go
  • Added “Additive RMS Jitter, Integration Bandwidth 10 kHz to 20 MHz” parameter with 100 MHz and 156.25 MHz Test conditions, Typical values, Max values, and footnotes in Electrical Characteristics: LVPECL Outputs Go
  • Added “Additive RMS Jitter, Integration Bandwidth 10 kHz to 20 MHz” parameter with 100 MHz and 156.25 MHz Test conditions, Typical values, Max values, and footnotes in Electrical Characteristics: LVDS Outputs Go
  • Added footnote for VI_SE parameter in the Electrical Characteristics table.Go
  • Added new paragraph at end of Driving the Clock Inputs Go
  • Changed Cin = 4 pF (typ, based on updated test method) in Crystal Interface Go
  • Added POWER SUPPLY SEQUENCINGGo

Changes from Revision F (February 2013) to Revision G (May 2013)

  • 更改了目标应用,方法为将附加应用添加到第二个和第三个要点,并且从第一个要点中删除高速和串行接口。Go
  • Changed guarantee to ensure.Go
  • Changed guarantee to ensure in Elec Char condition.Go
  • Changed VCM text to condition for VIH to VCM parametersGo
  • Deleted VIH min value from Electrical Characteristics Table.Go
  • Deleted VIL max value from Electrical Characteristics table.Go
  • Added VI_SE parameter and spec limits with corresponding table note to Electrical Characteristics Table.Go
  • Changed guarantee to ensure.Go
  • Changed "guarantee" to "ensure" throughout datasheet.Go
  • Changed third paragraph in Driving the Clock Inputs section to include CLKin* and LVCMOS text. Revised to better correspond with information in Electrical Characteristics Table.Go
  • Changed bypass cap text to signal attenuation text of the fourth paragraph in Driving the Clock Inputs section.Go
  • Changed Single-Ended LVCMOS Input, DC Coupling with Common Mode Biasing image with revised graphic.Go
  • Added text to second paragraph of Termination for AC Coupled Differential Operation to explain graphic update to Differential LVDS Operation with AC Coupling to Receivers Go
  • Changed graphic for Differential LVDS Operation, AC Coupling, No Biasing by the Receiver and updated caption.Go