ZHCS523J January   2007  – November 2014 LM5576 , LM5576-Q1

PRODUCTION DATA.  

  1. 特性
  2. 应用范围
  3. 说明
  4. 修订历史记录
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings: LM5576
    3. 6.3 Handling Ratings: LM5576-Q1
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Shutdown / Standby
      2. 7.3.2 Soft-Start
      3. 7.3.3 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 High Voltage Start-Up Regulator
      2. 7.4.2 Oscillator and Sync Capability
      3. 7.4.3 Error Amplifier and PWM Comparator
      4. 7.4.4 Ramp Generator
      5. 7.4.5 Maximum Duty Cycle / Input Drop-Out Voltage
      6. 7.4.6 Boost Pin
      7. 7.4.7 Current Limit
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Bias Power Dissipation Reduction
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  External Components
        2. 8.2.2.2  R3 (RT)
        3. 8.2.2.3  L1
        4. 8.2.2.4  C3 (CRAMP)
        5. 8.2.2.5  C9, C10
        6. 8.2.2.6  D1
        7. 8.2.2.7  C1, C2
        8. 8.2.2.8  C8
        9. 8.2.2.9  C7
        10. 8.2.2.10 C4
        11. 8.2.2.11 R5, R6
        12. 8.2.2.12 R1, R2, C12
        13. 8.2.2.13 R7, C11
        14. 8.2.2.14 R4, C5, C6
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 相关链接
    2. 11.2 商标
    3. 11.3 静电放电警告
    4. 11.4 Glossary
  12. 12机械、封装和可订购信息

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • PWP|20
散热焊盘机械数据 (封装 | 引脚)

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

8.1.1 Bias Power Dissipation Reduction

Buck regulators operating with high input voltage can dissipate an appreciable amount of power for the bias of the IC. The VCC regulator must step-down the input voltage VIN to a nominal VCC level of 7 V. The large voltage drop across the VCC regulator translates into a large power dissipation within the regulator. There are several techniques that can significantly reduce this bias regulator power dissipation. Figure 16 and VCC Figure 17 depict two methods to bias the IC from the output voltage. In each case the internal VCC regulator is used to initially bias the VCC pin. After the output voltage is established, the VCC pin potential is raised above the nominal 7 V regulation level, which effectively disables the internal VCC regulator. The voltage applied to the VCC pin should never exceed 14 V. The VCC voltage should never be larger than the VIN voltage.

LM5576 LM5576-Q1 20189918.gif Figure 16. VCC Bias From VOUT for 8 V < VOUT < 14 V
LM5576 LM5576-Q1 20189919.gif Figure 17. VCC Bias With Additional Winding on the Output Inductor

8.2 Typical Application

LM5576 LM5576-Q1 20189903.gif Figure 18. Typical Application

8.2.1 Design Requirements

The circuit shown in Figure 18 is configured for the following specifications:

  • VOUT = 5 V
  • VIN = 7 V to 75 V
  • Fs = 300 kHz
  • Minimum load current (for CCM) = 250 mA
  • Maximum load current = 3 A

8.2.2 Detailed Design Procedure

8.2.2.1 External Components

The procedure for calculating the external components is illustrated with the following design example. The Bill of Materials for this design is listed in Table 1.

Table 1. 5 V, 3 A Demo Board Bill of Materials

ITEM PART NUMBER DESCRIPTION VALUE
C 1 C4532X7R2A225M CAPACITOR, CER, TDK 2.2 µ, 100 V
C 2 C4532X7R2A225M CAPACITOR, CER, TDK 2.2 µ, 100 V
C 3 C0805C331G1GAC CAPACITOR, CER, KEMET 330 p, 100 V
C 4 C2012X7R2A103K CAPACITOR, CER, TDK 0.01 µ, 100 V
C 5 C2012X7R2A103K CAPACITOR, CER, TDK 0.01 µ, 100 V
C 6 OPEN NOT USED
C 7 C2012X7R2A223K CAPACITOR, CER, TDK 0.022 µ, 100 V
C 8 C2012X7R1C474M CAPACITOR, CER, TDK 0.47 µ, 16 V
C 9 C3225X7R1C226M CAPACITOR, CER, TDK 22 µ, 16 V
C 10 EEFHE0J151R CAPACITOR, SP, PANASONIC 150 µ, 6.3 V
C 11 C0805C331G1GAC CAPACITOR, CER, KEMET 330 p, 100 V
C 12 OPEN NOT USED
D 1 CSHD6-100C DIODE, 100V, CENTRAL
6CWQ10FN DIODE, 100V, IR (D1-ALT)
L 1 DR127-330 INDUCTOR, COOPER 33 µH
R 1 OPEN NOT USED
R 2 OPEN NOT USED
R 3 CRCW08052102F RESISTOR 21 kΩ
R 4 CRCW08054992F RESISTOR 49.9 kΩ
R 5 CRCW08055111F RESISTOR 5.11 kΩ
R 6 CRCW08051651F RESISTOR 1.65 kΩ
R 7 CRCW2512100J RESISTOR 10, 1 W
U 1 LM5576 REGULATOR, TEXAS INSTRUMENTS

8.2.2.2 R3 (RT)

RT sets the oscillator switching frequency. Generally, higher frequency applications are smaller but have higher losses. Operation at 300 kHz was selected for this example as a reasonable compromise for both small size and high efficiency. The value of RT for 300 kHz switching frequency can be calculated as follows:

Equation 9. LM5576 LM5576-Q1 q_rt_lvs447.gif

The nearest standard value of 21 kΩ was chosen for RT.

8.2.2.3 L1

The inductor value is determined based on the operating frequency, load current, ripple current, and the minimum and maximum input voltage (VIN(min), VIN(max)).

LM5576 LM5576-Q1 20189910.gif Figure 19. Inductor Current Waveform

To keep the circuit in continuous conduction mode (CCM), the maximum ripple current IRIPPLE should be less than twice the minimum load current, or 0.5 Ap-p. Using this value of ripple current, the value of inductor (L1) is calculated using the following:

Equation 10. LM5576 LM5576-Q1 q_l1_lvs447.gif
Equation 11. LM5576 LM5576-Q1 20189912.gif

This procedure provides a guide to select the value of L1. The nearest standard value (33 µH) will be used. L1 must be rated for the peak current (IPK+) to prevent saturation. During normal loading conditions, the peak current occurs at maximum load current plus maximum ripple. During an overload condition the peak current is limited to 4.2 A nominal (5.1 A maximum). The selected inductor (see Table 1) has a conservative 6.2 Amp saturation current rating. For this manufacturer, the saturation rating is defined as the current necessary for the inductance to reduce by 30%, at 20°C.

8.2.2.4 C3 (CRAMP)

With the inductor value selected, the value of C3 (CRAMP) necessary for the emulation ramp circuit is:

Equation 12. CRAMP = L x 10-5

Where:

L is in Henrys

With L1 selected for 33 µH the recommended value for C3 is 330 pF.

8.2.2.5 C9, C10

The output capacitors, C9 and C10, smooth the inductor ripple current and provide a source of charge for transient loading conditions. For this design a 22-µF ceramic capacitor and a 150-µF SP organic capacitor were selected. The ceramic capacitor provides ultra low ESR to reduce the output ripple voltage and noise spikes, while the SP capacitor provides a large bulk capacitance in a small volume for transient loading conditions. An approximation for the output ripple voltage is:

Equation 13. LM5576 LM5576-Q1 20189913.gif

8.2.2.6 D1

A Schottky type re-circulating diode is required for all LM5576 applications. Ultra-fast diodes are not recommended and may result in damage to the IC due to reverse recovery current transients. The near ideal reverse recovery characteristics and low forward voltage drop are particularly important diode characteristics for high input voltage and low output voltage applications common to the LM5576. The reverse recovery characteristic determines how long the current surge lasts each cycle when the buck switch is turned on. The reverse recovery characteristics of Schottky diodes minimize the peak instantaneous power in the buck switch occurring during turn-on each cycle. The resulting switching losses of the buck switch are significantly reduced when using a Schottky diode. The reverse breakdown rating should be selected for the maximum VIN, plus some safety margin.

The forward voltage drop has a significant impact on the conversion efficiency, especially for applications with a low output voltage. “Rated” current for diodes vary widely from various manufacturers. The worst case is to assume a short circuit load condition. In this case the diode will carry the output current almost continuously. For the LM5576 this current can be as high as 4.2 A. Assuming a worst case 1 V drop across the diode, the maximum diode power dissipation can be as high as 4.2 W. For the reference design a 100 V Schottky in a DPAK package was selected.

8.2.2.7 C1, C2

The regulator supply voltage has a large source impedance at the switching frequency. Good quality input capacitors are necessary to limit the ripple voltage at the VIN pin while supplying most of the switch current during the on-time. When the buck switch turns on, the current into the VIN pin steps to the lower peak of the inductor current waveform, ramps up to the peak value, then drops to zero at turn-off. The average current into VIN during the on-time is the load current. The input capacitance should be selected for RMS current rating and minimum ripple voltage. A good approximation for the required ripple current rating necessary is IRMS > IOUT / 2.

Quality ceramic capacitors with a low ESR should be selected for the input filter. To allow for capacitor tolerances and voltage effects, two 2.2-µF, 100 V ceramic capacitors will be used. If step input voltage transients are expected near the maximum rating of the LM5576, a careful evaluation of ringing and possible spikes at the device VIN pin should be completed. An additional damping network or input voltage clamp may be required in these cases.

8.2.2.8 C8

The capacitor at the VCC pin provides noise filtering and stability for the VCC regulator. The recommended value of C8 should be no smaller than 0.1-µF, and should be a good quality, low ESR, ceramic capacitor. A value of 0.47-µF was selected for this design.

8.2.2.9 C7

The bootstrap capacitor between the BST and the SW pins supplies the gate current to charge the buck switch gate at turn-on. The recommended value of C7 is 0.022-µF, and should be a good quality, low ESR, ceramic capacitor.

8.2.2.10 C4

The capacitor at the SS pin determines the soft-start time, i.e. the time for the reference voltage and the output voltage, to reach the final regulated value. The time is determined from:

Equation 14. LM5576 LM5576-Q1 q_tss_lvs447.gif

For this application, a C4 value of 0.01-µF was chosen which corresponds to a soft-start time of 1 ms.

8.2.2.11 R5, R6

R5 and R6 set the output voltage level, the ratio of these resistors is calculated from:

Equation 15. R5/R6 = (VOUT / 1.225 V) - 1

For a 5 V output, the R5/R6 ratio calculates to 3.082. The resistors should be chosen from standard value resistors, a good starting point is selection in the range of 1.0 kΩ - 10 kΩ. Values of 5.11 kΩ for R5, and 1.65 kΩ for R6 were selected.

8.2.2.12 R1, R2, C12

A voltage divider can be connected to the SD pin to set a minimum operating voltage VIN(min) for the regulator. If this feature is required, the easiest approach to select the divider resistor values is to select a value for R1 (between 10 kΩ and 100 kΩ recommended) then calculate R2 from:

Equation 16. LM5576 LM5576-Q1 20189914.gif

Capacitor C12 provides filtering for the divider. The voltage at the SD pin should never exceed 8 V, when using an external set-point divider it may be necessary to clamp the SD pin at high input voltage conditions. The reference design utilizes the full range of the LM5576 (6V to 75V); therefore these components can be omitted. With the SD pin open circuit the LM5576 responds once the VCC UVLO threshold is satisfied.

8.2.2.13 R7, C11

A snubber network across the power diode reduces ringing and spikes at the switching node. Excessive ringing and spikes can cause erratic operation and couple spikes and noise to the output. Voltage spikes beyond the rating of the LM5576 or the re-circulating diode can damage these devices. Selecting the values for the snubber is best accomplished through empirical methods. First, make sure the lead lengths for the snubber connections are very short. For the current levels typical for the LM5576 a resistor value between 5 and 20 Ohms is adequate. Increasing the value of the snubber capacitor results in more damping but higher losses. Select a minimum value of C11 that provides adequate damping of the SW pin waveform at high load.

8.2.2.14 R4, C5, C6

These components configure the error amplifier gain characteristics to accomplish a stable overall loop gain. One advantage of current mode control is the ability to close the loop with only two feedback components, R4 and C5. The overall loop gain is the product of the modulator gain and the error amplifier gain. The DC modulator gain of the LM5576 is as follows:

Equation 17. DC Gain(MOD) = Gm(MOD) x RLOAD = 2 x RLOAD

The dominant low frequency pole of the modulator is determined by the load resistance (RLOAD,) and output capacitance (COUT). The corner frequency of this pole is:

Equation 18. fp(MOD) = 1 / (2π RLOAD COUT)

For RLOAD = 5 Ω and COUT = 177 µF then fp(MOD) = 180 Hz

DC Gain(MOD) = 2 x 5 = 10 = 20 dB

For the design example of Figure 18 the following modulator gain vs. frequency characteristic was measured as shown in Figure 20.

LM5576 LM5576-Q1 20189915.gif Figure 20. Gain and Phase of Modulator R = 5 Ohms and
C = 177 µF Loadout

Components R4 and C5 configure the error amplifier as a type II configuration which has a pole at DC and a zero at fZ = 1 / (2πR4C5). The error amplifier zero cancels the modulator pole leaving a single pole response at the crossover frequency of the loop gain. A single pole response at the crossover frequency yields a very stable loop with 90 degrees of phase margin.

For the design example, a target loop bandwidth (crossover frequency) of 20 kHz was selected. The compensation network zero (fZ) should be selected at least an order of magnitude less than the target crossover frequency. This constrains the product of R4 and C5 for a desired compensation network zero 1 / (2π R4 C5) to be less than 2 kHz. Increasing R4, while proportionally decreasing C5, increases the error amp gain. Conversely, decreasing R4 while proportionally increasing C5, decreases the error amp gain. For the design example C5 was selected for 0.01-µF and R4 was selected for 49.9 kΩ. These values configure the compensation network zero at 320 Hz. The error amp gain at frequencies greater than fZ is: R4 / R5, which is approximately 10 (20 dB).

LM5576 LM5576-Q1 20189916.gif Figure 21. Error Amplifier Gain and Phase

The overall loop can be predicted as the sum (in dB) of the modulator gain and the error amp gain.

LM5576 LM5576-Q1 20189917.gif Figure 22. Overall Loop Gain and Phase

If a network analyzer is available, the modulator gain can be measured and the error amplifier gain can be configured for the desired loop transfer function. If a network analyzer is not available, the error amplifier compensation components can be designed with the guidelines given. Step load transient tests can be performed to verify acceptable performance. The step load goal is minimum overshoot with a damped response. C6 can be added to the compensation network to decrease noise susceptibility of the error amplifier. The value of C6 must be sufficiently small since the addition of this capacitor adds a pole in the error amplifier transfer function. This pole must be well beyond the loop crossover frequency. A good approximation of the location of the pole added by C6 is: fp2 = fz x C5 / C6.

8.2.3 Application Curves

LM5576 LM5576-Q1 20189920.gif Figure 23. Oscillator Frequency vs RT
LM5576 LM5576-Q1 20189915.gif Figure 25. Gain and Phase Of Modulator R = 5 Ohms And C = 177 µF Loadout
LM5576 LM5576-Q1 20189917.gif Figure 27. Overall Loop Gain and Phase
LM5576 LM5576-Q1 20189926.gif Figure 24. Demoboard Efficiency vs IOUT and VIN
LM5576 LM5576-Q1 20189916.gif Figure 26. Error Amplifier Gain and Phase