Table 1. Design Parameters

8.2.2.1 LM4040 Voltage and Accuracy Choice

When using LM4040 as a reference for an ADC, the ADC's FSR (Full Scale Range), Resolution and LSB must be determined. LSB can be determined by:

      LSB=FSR/(2^N-1)

With N being the resolution or Number of Bits. FSR and Resolution can be determined by the ADC's datasheet.

Vref can be determined by:

      Vref=FSR+LSB

Though modern data converters use calibration techniques to compensate for any error introduced by a Vref's inaccuracy, it is best to use the highest accuracy available. This is due to errors in the calibration method that may allow some non-linearities introduced by the Vref's initial accuracy.

A good example is the LM4040x-41 that is designed to be a cost-effective voltage reference as required in 12-bit data-acquisition systems. For 12-bit systems operating from 5-V supplies (see Figure 6), the LM4040A-41 (4.096 V, 0.01%) only introduces 4 LSBs (4mV) of possible error in a system that consists of 4096 LSBs.

8.2.2.2 Cathode and Load Currents

In a typical shunt-regulator configuration (see Figure 7), an external resistor, R_S, is connected between the supply and the cathode of the LM4040. R_S must be set properly, as it sets the total current available to supply the load (I_L) and bias the LM4040 (I_Z). In all cases, I_Z must stay within a specified range for proper operation of the reference. Taking into consideration one extreme in the variation of the load and supply voltage (maximum I_L and minimum V_S), R_S must be small enough to supply the minimum I_Z required for operation of the regulator, as given by data-sheet parameters. At the other extreme, maximum V_S and minimum I_L, R_S must be large enough to limit I_Z to less than its maximum-rated value of 15 mA.

R_S is calculated according to Equation 1:

Equation 1.

Figure 7. Shunt Regulator

8.2.2.3 Output Capacitor

The LM4040 does not require an output capacitor across cathode and anode for stability. However, if an output bypass capacitor is desired, the LM4040 is designed to be stable with all capacitive loads.

8.2.2.4 SOT-23 Connections

There is a parasitic Schottky diode connected between pins 2 and 3 of the SOT-23 packaged device. Thus, pin 3 of the SOT-23 package must be left floating or connected to pin 2.

8.2.2.5 Start-Up Characteristics

In any data conversion system, start-up characteristics are important, as to determine when it is safe begin conversion based upon a steady and settled reference value. As shown in Figure 9 it is best to allow for >20µs from supply start-up to begin conversion.

Figure 8. Test Circuit