7 Parameter Measurement Information

Figure 7-1 Driver V_OD Test and Current Definitions

Figure 7-2 Driver V_OD With Common-Mode Loading Test Circuit

Figure 7-3 Test Circuit and Waveform Definitions for the Driver Common-Mode Output Voltage

Figure 7-4 Driver Switching Test Circuit and Voltage Waveforms

Note:

Driver output pins are A and B for the ISO15 (see Figure 7-1 through Figure 7-4). These correspond to ISO35 pins Y and Z

Figure 7-5 Driver High-Level Output Enable and Disable Time Test Circuit and Voltage Waveforms

Figure 7-6 Driver Low-Level Output Enable and Disable Time Test Circuit and Voltage Waveform

Note:

Driver output pins are A and B for the ISO15 (see Figure 7-5 through Figure 7-6). These correspond to ISO35 pins Y and Z

Figure 7-7 Receiver Voltage and Current Definitions

Figure 7-8 Receiver Switching Test Circuit and Waveforms

Figure 7-9 Receiver Enable Test Circuit and Waveforms, Data Output High

Figure 7-10 Receiver Enable Test Circuit and Waveforms, Data Output Low

Figure 7-11 Transient Overvoltage Test Circuit

Figure 7-12 Half-Duplex Common-Mode Transient Immunity Test Circuit

Figure 7-13 Full-Duplex Common-Mode Transient Immunity Test Circuit