ZHCSGB6A May   2017  – June 2017 INA826S

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Inside the INA826S
      2. 7.3.2 Setting the Gain
        1. 7.3.2.1 Gain Drift
      3. 7.3.3 Offset Trimming
      4. 7.3.4 Input Common-Mode Range
      5. 7.3.5 Input Protection
      6. 7.3.6 Input Bias Current Return Path
      7. 7.3.7 Reference Pin (REF)
      8. 7.3.8 Shutdown (EN and ENREF) Pins
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Low-Voltage Operation
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 文档支持
      1. 11.1.1 相关文档
    2. 11.2 接收文档更新通知
    3. 11.3 社区资源
    4. 11.4 商标
    5. 11.5 静电放电警告
    6. 11.6 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The low power consumption and high performance of the INA826S make the device an excellent instrumentation amplifier for many applications. The INA826S can be used in many low-power, portable applications because the device has a low quiescent current (200 µA, typical) and comes in a small 10-pin VSON package. The input protection circuitry, low maximum gain drift, low offset voltage, and 36-V maximum supply voltage also make the INA826S an ideal choice for industrial applications as well.

8.2 Typical Application

Figure 74 shows a three-terminal, programmable-logic controller (PLC) design for the INA826S. This PLC reference design accepts inputs of ±10 V or ±20 mA. The output is a single-ended voltage of 2.5 V ± 2.3 V (or 200 mV to 4.8 V). Many PLCs typically have these input and output ranges.

INA826S ai_3-term_plc_sbos770.gif Figure 74. Three-Terminal Analog Input for PLCs

8.2.1 Design Requirements

This design has the following requirements:

  • Supply voltage: ±15 V, 5 V
  • Inputs: ±10 V, ±20 mA
  • Output: 2.5 V, ±2.3 V

8.2.2 Detailed Design Procedure

There are two modes of operation for the circuit shown in Figure 74: current input and voltage input. This design requires R1 >> R2 >> R3. Given this relationship, Equation 2 calculates the current input mode transfer function.

Equation 2. INA826S q_curr_mode_xfer_function_bos562.gif

where

  • G represents the gain of the instrumentation amplifier

Equation 3 shows the transfer function for the voltage input mode.

Equation 3. INA826S q_voltage_input_mode_xfer_function_bos562.gif

R1 sets the input impedance of the voltage input mode. The minimum typical input impedance is 100 kΩ. 100 kΩ is selected for R1 because increasing the R1 value also increases noise. The value of R3 must be extremely small compared to R1 and R2. 20 Ω for R3 is selected because that resistance value is much smaller than R1 and yields an input voltage of ±400 mV when operated in current mode (±20 mA).

Equation 4 can be used to calculate R2 given VD = ±400 mV, VIN = ±10 V, and R1 = 100 kΩ.

Equation 4. INA826S q_r2_vd_vin_r1_bos562.gif

The value obtained from Equation 4 is not a standard 0.1% value, so 4.12 kΩ is selected. R1 and R2 also use 0.1% tolerance resistors to minimize error.

Use Equation 5 to calculate the ideal gain of the instrumentation amplifier.

Equation 5. INA826S q_ideal_gain_bos562.gif

Equation 6 calculates the gain-setting resistor value using the INA826S gain equation, Equation 1.

Equation 6. INA826S q_gain_setting_value_bos562.gif

10.4 kΩ is a standard 0.1% resistor value that can be used in this design. Finally, the output RC filter components are selected to have a –3-dB cutoff frequency of 1 MHz.

8.2.3 Application Curves

Figure 75 and Figure 76 show typical characteristic curves for Figure 74.

INA826S D071_SBOS770.gif
Figure 75. PLC Output Voltage vs Input Voltage
INA826S D070_SBOS770.gif
Figure 76. PLC Output Voltage vs Input Current