ZHCSFO8C July   2016  – September 2023 INA250-Q1

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Integrated Shunt Resistor
      2. 7.3.2 Short-Circuit Duration
      3. 7.3.3 Temperature Stability
    4. 7.4 Device Functional Modes
      1. 7.4.1 Amplifier Operation
      2. 7.4.2 Input Filtering
        1. 7.4.2.1 Calculating Gain Error Resulting from External Filter Resistance
      3. 7.4.3 Shutting Down the Device
      4. 7.4.4 Using the Device with Common-Mode Transients Above 36 V
  9. Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Current Summing
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Parallel Multiple INA250-Q1 Devices for Higher Current
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curve
      3. 8.2.3 Current Differencing
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
        3. 8.2.3.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Examples
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 接收文档更新通知
    3. 9.3 支持资源
    4. 9.4 Trademarks
    5. 9.5 静电放电警告
    6. 9.6 术语表
  11. 10Mechanical, Packaging, and Orderable Information

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Shutting Down the Device

Although the device does not have a shutdown pin, the low power consumption allows for the device to be powered from the output of a logic gate or transistor switch that may turn on and turn off the voltage connected to the device power-supply pin. However, in current-shunt monitoring applications, there is also a concern for how much current is drained from the shunt circuit in shutdown conditions. Evaluating this current drain involves considering the simplified schematic in shutdown mode, as shown in Figure 7-6.

GUID-83E3D507-FD22-4691-B060-609585991DD8-low.gifFigure 7-6 Shutting Down the Device

Note that there is typically an approximate 1-MΩ impedance (from the combination of the feedback and input resistors) from each device input to the REF pin. The amount of current flowing through these pins depends on the respective configuration. For example, if the REF pin is grounded, calculating the effect of the 1-MΩ impedance from the shunt to ground is straightforward. However, if the reference or op amp is powered when the device is shut down, the calculation is direct. Instead of assuming 1 MΩ to ground, assume 1 MΩ to the reference voltage. If the reference or op amp is also shut down, some knowledge of the reference or op amp output impedance under shutdown conditions is required. For instance, if the reference source functions similar to an open circuit when un-powered, little or no current flows through the 1-MΩ path.