ZHCSRF0 December   2022 DS90LVRA2

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Power Decoupling Recommendations
        2. 9.2.2.2 Termination
        3. 9.2.2.3 Input Failsafe Biasing
        4. 9.2.2.4 Probing LVDS Transmission Lines
    3. 9.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Differential Traces
      2. 11.1.2 PC Board Considerations
    2. 11.2 Layout Examples
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 接收文档更新通知
    3. 12.3 支持资源
    4. 12.4 Trademarks
    5. 12.5 静电放电警告
    6. 12.6 术语表
  13. 13Mechanical, Packaging, and Orderable Information

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6.6 Switching Characteristics

Over Supply Voltage and Operating Temperature ranges, unless otherwise specified.(2)(3)(4)
Symbol Parameter Conditions MIN TYP MAX UNIT
tPHLD_1p8 Differential Propagation Delay High to Low VID = 200 mV, CL = 10 pF, trf=1 ns, VCC 1.8 V ±10% 2.7 4.3 7.7 ns
tPHLD_1p8_5 Differential Propagation Delay High to Low VID = 200 mV, CL = 10 pF, trf=1 ns, VCC 1.8 V ±5% 2.8 4.3 7.1 ns
tPLHD_1p8 Differential Propagation Delay Low to High VID = 200 mV, CL = 10 pF, trf=1 ns, VCC 1.8 V ±10% 2.7 4.4 7.7 ns
tPLHD_1p8_5 Differential Propagation Delay Low to High VID = 200 mV, CL = 10 pF, trf=1 ns, VCC 1.8 V ±5% 2.8 4.4 7.1 ns
tSKD1_1p8_S Differential Pulse Skew (tPHLD – tPLHD )(7) VID = 200 mV, CL = 10 pF, trf=1 ns, VCC=1.8 V±10% -500 500 ps
tSKD1_1p8_5_S Differential Pulse Skew (tPHLD – tPLHD )(7) VID = 200 mV, CL = 10 pF, trf=1 ns, VCC=1.8 V±5% -400 400 ps
tSKD1_1p8_S_400M Differential Pulse Skew (tPHLD – tPLHD) (7) VID = 200 mV, CL = 10 pF, trf=0.25 ns DR=400M, VCC=1.8 V±10% -500 500 ps
tSKD1_1p8_5_S_400M Differential Pulse Skew (tPHLD – tPLHD) (7) VID = 200 mV, CL = 10 pF, trf=0.25 ns DR=400M,VCC=1.8 V±5% -400 400 ps
tSKD2_1p8 Differential Channel-to-Channel Skew-same device (6) VID = 200 mV, CL = 10 pF, trf=0.25 ns VCC=1.8 V±10% 0.5 ns
tSKD2_1p8_5 Differential Channel-to-Channel Skew-same device (8) VID = 200 mV, CL = 10 pF, trf=0.25 ns VCC=1.8 V±5% 0.4 ns
tSKD3_1p8_5 Differential Part to Part Skew (9) VID = 200 mV, CL = 10 pF, trf=0.25 ns VCC=1.8 V±5% at same temperature 2.7 ns
tSKD3_1p8_5_25C Differential Part to Part Skew (9) VID = 200 mV, CL = 10 pF, trf=0.25 ns VCC=1.8 V±5% at  TJ =25℃ 2.6 ns
tSKD3_1p8_5_70C Differential Part to Part Skew (9) VID = 200 mV, CL = 10 pF, trf=0.25 ns VCC=1.8 V±5% at  TJ =70℃ 2.7 ns
tSKD3_1p8_5_125C Differential Part to Part Skew (9) VID = 200 mV, CL = 10 pF, trf=0.25 ns VCC=1.8 V±5% at TJ= 125℃ 2.7 ns
tTLH_1p8 Rise Time 250 500 720 ps
tTHL_1p8 Fall Time 250 500 720 ps
fMAX Maximum Operating Frequency (11) 300 MHz
(2) All typicals are given for: VCC = 1.8V and TA = +25°C.
(3) CL includes probe and jig capacitance.
(4) Generator waveform for all tests unless otherwise specified: f = 1 MHz, ZO = 50Ω, tr and tf (0% to 100%) ≤ 3 ns for RIN.
(5) tSKD1 is the magnitude difference in differential propagation delay time between the positive-going-edge and the negative-going-edge of the same channel.
(6) tSKD2 is the differential channel-to-channel skew of any event on the same device. This specification applies to devices having multiple receivers within the integrated circuit.
(7) tSKD3, part to part skew, is the differential channel-to-channel skew of any event between devices. This specification applies to devices at the same VCC and within 5°C of each other within the operating temperature range.
(8) fMAX generator input conditions: tr = tf < 1 ns (0% to 100%), 50% duty cycle, differential (1.05V to 1.35 peak to peak). Output criteria: 60%/40% duty cycle, VOL (max), VOH (min), load = 15 pF (stray plus probes).