ZHCSJB5B September 2019 – December 2019 DRV8904-Q1 , DRV8906-Q1 , DRV8908-Q1 , DRV8910-Q1 , DRV8912-Q1
UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
The PWM control 1 register is shown in Figure 108 and described in Table 66.
Register access type: Read/Write
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
HB8_PWM | HB7_PWM | HB6_PWM | HB5_PWM | HB4_PWM | HB3_PWM | HB2_PWM | HB1_PWM |
R/W-0b | R/W-0b | R/W-0b | R/W-0b | R/W-0b | R/W-0b | R/W-0b | R/W-0b |
Bit | Field | Type | Default | Description |
---|---|---|---|---|
7 | HB8_PWM | R/W | 0b |
0b = Half-bridge 8 is operating in continuous mode 1b = Half-bridge 8 is operating in PWM mode |
6 | HB7_PWM | R/W | 0b |
0b = Half-bridge 7 is operating in continuous mode 1b = Half-bridge 7is operating in PWM mode |
5 | HB6_PWM | R/W | 0b |
0b = Half-bridge 6 is operating in continuous mode 1b = Half-bridge 6 is operating in PWM mode |
4 | HB5_PWM | R/W | 0b |
0b = Half-bridge 5 is operating in continuous mode 1b = Half-bridge 5 is operating in PWM mode |
3 | HB4_PWM | R/W | 0b |
0b = Half-bridge 4 is operating in continuous mode 1b = Half-bridge 4 is operating in PWM mode |
2 | HB3_PWM | R/W | 0b |
0b = Half-bridge 3 is operating in continuous mode 1b = Half-bridge 3 is operating in PWM mode |
1 | HB2_PWM | R/W | 0b |
0b = Half-bridge 2 is operating in continuous mode 1b = Half-bridge 2 is operating in PWM mode |
0 | HB1_PWM | R/W | 0b |
0b = Half-bridge 1 is operating in continuous mode 1b = Half-bridge 1 is operating in PWM mode |