SBAS368D May   2006  – December 2016 DDC264

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Dual Switched Integrator: Basic Integration Cycle
      2. 8.3.2 Integration Capacitors
      3. 8.3.3 Voltage Reference
      4. 8.3.4 Serial Data Output and Control Interface
        1. 8.3.4.1 System and Data Clocks (CLK and DCLK)
        2. 8.3.4.2 CONV: Setting the Integration Time
        3. 8.3.4.3 Data Valid (DVALID)
        4. 8.3.4.4 Data Format
        5. 8.3.4.5 Data Retrieval
          1. 8.3.4.5.1 Cascading Multiple Converters
          2. 8.3.4.5.2 Retrieval Before CONV Toggles
          3. 8.3.4.5.3 Retrieval After CONV Toggles
          4. 8.3.4.5.4 Retrieval Before and After CONV Toggles
    4. 8.4 Device Functional Modes
    5. 8.5 Programming
      1. 8.5.1 Reset (RESET)
      2. 8.5.2 Configuration Register — Read and Write Operations
    6. 8.6 Register Maps
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input Connection
        2. 9.2.2.2 Selecting Integration Time, Device Clock, and Range
        3. 9.2.2.3 Voltage Reference
        4. 9.2.2.4 Reading the Measurement
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
    1. 10.1 Power-Up Sequencing
    2. 10.2 Power Supplies and Grounding
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Shielding Analog Signal Paths
      2. 11.1.2 Power Supply Routing
      3. 11.1.3 Reference Routing
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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Device Comparison Table

PRODUCT NO. OF CHANNELS FULL-SCALE MAXIMUM
DATA RATE
POWER/CHANNEL
AT MAX DATA RATE
PACKAGE-PIN
DDC112 2 1000 pC 2 KSPS 80 mW SO-28, TQFP-32
DDC112K 2 1000 pC 3 KSPS 85 mW SO-28, TQFP-32
DDC114 4 350 pC 3.1 KSPS 18 mW QFN-48
DDC118 8 350 pC 3.1 KSPS 18 mW QFN-48
DDC316 16 12 pC 100 KSPS 28 mW BGA-64
DDC232C 32 350 pC 3.1 KSPS 7 mW BGA-64
DDC232CK 32 350 pC 6.2 KSPS 10 mW BGA-64
DDC264C 64 150 pC 3.1 KSPS 3 mW BGA-100
DDC264CK 64 150 pC 6.2 KSPS 5.5 mW BGA-100
DDC1128 128 150 pC 6.2 KSPS 5.5 mW BGA-192
DD2256A 256 150 pC 17 KSPS 2.2 mW BGA-323