ZHCS348C August 2011 – August 2018 BUF20800-Q1
PRODUCTION DATA.
The BUF20800-Q1 responds to a General Call Reset, which is an address byte of 00h (0000 0000) followed by a data byte of 06h (0000 0110). The BUF20800-Q1 acknowledges both bytes. Upon receiving a General Call Reset, the BUF20800-Q1 performs a full internal reset, as though it had been powered off and then on. It always acknowledges the General Call address byte of 00h (0000 0000), but does not acknowledge any General Call data bytes other than 06h (0000 0110).
The BUF20800-Q1 automatically performs a reset upon power up. As part of the reset, all outputs are set to (VREFH − VREFL)/2. Other reset values are available as a custom modification—contact your TI representative for details.
The BUF20800-Q1 resets all outputs to (VREFH − VREFL)/2 after sending the device address, if a valid DAC address is sent with bits D7 to D5 set to ‘100’. If these bits are set to ‘010’, only the DAC being addressed in this most significant byte (MSB) and the following least significant byte (LSB) will be reset.