ZHCSC23D January   2014  – April 2017

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
  4. 修订历史记录
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Supply Current
    6. 7.6  Digital Input and Output DC Characteristics
    7. 7.7  LDO Regulator, Wake-Up, and Auto-Shutdown DC Characteristics
    8. 7.8  ADC (Temperature and Cell Measurement) Characteristics
    9. 7.9  Integrating ADC (Coulomb Counter) Characteristics
    10. 7.10 I2C-Compatible Interface Communication Timing Characteristics
    11. 7.11 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
    5. 8.5 Programming
      1. 8.5.1 Standard Data Commands
      2. 8.5.2 Control(): 0x00 and 0x01
      3. 8.5.3 Extended Data Commands
      4. 8.5.4 Communications
        1. 8.5.4.1 I2C Interface
        2. 8.5.4.2 I2C Time Out
        3. 8.5.4.3 I2C Command Waiting Time
        4. 8.5.4.4 I2C Clock Stretching
  9. Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 High-Side or Low-Side Sense Resistor
        2. 9.2.2.2 BAT Voltage Sense Input
        3. 9.2.2.3 Sense Resistor Selection
        4. 9.2.2.4 Communication Interface Lines
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendation
    1. 10.1 Power Supply Decoupling
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 文档支持
      1. 12.1.1 相关文档
      2. 12.1.2 社区资源
    2. 12.2 商标
    3. 12.3 静电放电警告
    4. 12.4 Glossary
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Layout

Layout Guidelines

  • A capacitor, of value at least 0.47 µF, is connected between the VDD pin and VSS. The capacitor should be placed close to the gauge IC and have short traces to both the VDD pin and VSS.
  • It is required to have a capacitor, at least 1.0 µF, connect between the BAT pin and VSS if the connection between the battery pack and the gauge BAT pin has the potential to pick up noise. The capacitor should be placed close to the gauge IC and have short traces to both the VDD pin and VSS.
  • If the external pullup resistors on the SCL and SDA lines will be disconnected from the host during low-power operation, it is recommended to use external 1-MΩ pulldown resistors to VSS to avoid floating inputs to the I2C engine.
  • The value of the SCL and SDA pullup resistors should take into consideration the pullup voltage and the bus capacitance. Some recommended values, assuming a bus capacitance of 10 pF, can be seen in Table 4.
  • Table 4. Recommended Values for SCL and SDA Pullup Resistors

    VPU 1.8 V 3.3 V
    RPU Range Typical Range Typical
    400 Ω ≤ RPU ≤ 37.6 kΩ 10 kΩ 900 Ω ≤ RPU ≤ 29.2 kΩ 5.1 kΩ
  • If the GPOUT pin is not used by the host, the pin should still be pulled up to VDD with a 4.7-kΩ or 10-kΩ resistor. After the OTP has been programmed, it is recommended that PROG be connected to the SDA line with a 470-KΩ resistor so that in cases where the device is in SHUTDOWN, toggling PROG can wake the gauge up from the SHUTDOWN state.
  • If the battery pack thermistor is not connected to the BIN pin, the BIN pin should be pulled down to VSS with a 10-kΩ resistor.
  • The BIN pin should not be shorted directly to VDD or VSS.
  • The actual device ground is the center pin (B2). The C1 pin is floating internally and can be used as a bridge to connect the board ground plane to the device ground (B2).

Layout Example

bq27411-G1 bq27411_layoutDia_slusbn7.gif Figure 10. bq27411-G1 Board Layout