ZHCSAK5C December   2012  – December 2015 ADS42B49

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Description (continued)
  6. 6 ADS424x and ADS422x Family Comparison
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Thermal Information
    5. 8.5  Electrical Characteristics: ADS42B49 (250 MSPS)
    6. 8.6  Electrical Characteristics: General
    7. 8.7  Digital Characteristics
    8. 8.8  Timing Requirements: LVDS and CMOS Modes
    9. 8.9  Serial Interface Timing Characteristics
    10. 8.10 Reset Timing (Only When Serial Interface is Used)
    11. 8.11 LVDS Timings at Lower Sampling Frequencies
    12. 8.12 CMOS Timings at Lower Sampling Frequencies
    13. 8.13 Typical Characteristics
      1. 8.13.1 ADS42B49
      2. 8.13.2 Contour
  9. 9 Parameter Measurement Information
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagram
    3. 10.3 Feature Description
      1. 10.3.1 Migrating from the ADS62P49 and ADS4249
      2. 10.3.2 Digital Functions
      3. 10.3.3 Gain for SFDR and SNR Trade-Off
      4. 10.3.4 Offset Correction
    4. 10.4 Device Functional Modes
      1. 10.4.1 Power-Down
        1. 10.4.1.1 Global Power-Down
        2. 10.4.1.2 Channel Standby
        3. 10.4.1.3 Input Clock Stop
      2. 10.4.2 Digital Output Information
        1. 10.4.2.1 Output Interface
        2. 10.4.2.2 DDR LVDS Outputs
        3. 10.4.2.3 LVDS Buffer
        4. 10.4.2.4 Parallel CMOS Interface
        5. 10.4.2.5 CMOS Interface Power Dissipation
        6. 10.4.2.6 Multiplexed Mode of Operation
        7. 10.4.2.7 Output Data Format
      3. 10.4.3 Parallel Configuration Details
    5. 10.5 Programming
      1. 10.5.1 Parallel Configuration Only
      2. 10.5.2 Serial Interface Configuration Only
      3. 10.5.3 Using Both Serial Interface and Parallel Controls
      4. 10.5.4 Serial Interface Details
        1. 10.5.4.1 Register Initialization
        2. 10.5.4.2 Serial Register Readout
    6. 10.6 Register Maps
      1. 10.6.1 Register Description
  11. 11Application and Implementation
    1. 11.1 Application Information
      1. 11.1.1 Driving Circuit
        1. 11.1.1.1 Drive Circuit Requirements
      2. 11.1.2 Clock Input
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
      2. 11.2.2 Detailed Design Procedure
        1. 11.2.2.1 Analog Input
        2. 11.2.2.2 Clock Driver
        3. 11.2.2.3 Digital Interface
      3. 11.2.3 Application Curves
  12. 12Power Supply Recommendations
    1. 12.1 Using DC/DC Power Supplies
    2. 12.2 Power Supply Bypassing
  13. 13Layout
    1. 13.1 Layout Guidelines
      1. 13.1.1 Grounding
      2. 13.1.2 Supply Decoupling
      3. 13.1.3 Exposed Pad
      4. 13.1.4 Routing Analog Inputs
    2. 13.2 Layout Example
  14. 14器件和文档支持
    1. 14.1 器件支持
      1. 14.1.1 器件命名规则
    2. 14.2 文档支持
      1. 14.2.1 相关文档　
    3. 14.3 社区资源
    4. 14.4 商标
    5. 14.5 静电放电警告
    6. 14.6 Glossary
  15. 15机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

4 修订历史记录

Changes from B Revision (January 2013) to C Revision

  • 已添加 ESD 额定值表，特性 描述部分，器件功能模式，应用和实施部分，电源相关建议部分，布局部分，器件和文档支持部分以及机械、封装和可订购信息部分。Go

Changes from A Revision (December 2012) to B Revision

Changes from * Revision (December 2012) to A Revision

  • Changed 产品状态从产品预览到量产数据Go
  • Changed Analog Inputs, VID parameter nominal specification in Recommended Operating Conditions tableGo
  • Changed Analog Inputs, Maximum analog input frequency parameter rows in Recommended Operating conditions tableGo
  • Changed footnote 1 in Recommended Operating Conditions tableGo
  • Changed PSRR parameter test conditions in Electrical Characteristics: ADS42B49 tableGo
  • Deleted DNL and INL rows from Electrical Characteristics: ADS42B49 tableGo
  • Changed Analog Inputs, VID parameter typical specification in Electrical Characteristics: General tableGo
  • Deleted Analog Inputs, Analog input common-mode current row from Electrical Characteristics: General tableGo
  • Changed DC Accuracy, Offset error parameter typical specification in Electrical Characteristics: General tableGo
  • Changed Power Supply, IDRVDD parameter CMOS interface row in Electrical Characteristics: General tableGo
  • Changed Power Supply, Digital power, CMOS interface parameter typical specification in Electrical Characteristics: General tableGo
  • Changed tJ parameter typical specification in Timing Requirements tableGo
  • Deleted Wakeup time maximum specifications in Timing Requirements tableGo
  • Changed footnote 1 in Timing Requirements tableGo
  • Changed ADC latency, default after reset typical specification in Timing Requirements tableGo
  • Changed ADC latency parameter typical specification in Timing Requirements tableGo
  • Added tPDI specifications to Timing Requirements tableGo
  • Updated Figure 40Go
  • Updated Figure 41Go
  • Filled in TBD in Theory of Operation sectionGo
  • Changed description of Multiplexed Mode of Operation sectionGo
  • Changed first column of (5 / 8) AVDD row in Table 7Go
  • Changed sixth row in Table 8Go
  • Changed CTRL1, CTRL2, and CTRL3 control mode description in Table 9Go
  • Changed third paragraph in the Serial Register Readout sectionGo
  • Added Analog Input sectionGo
  • Changed description of Driving Circuit sectionGo
  • Added Figure 54 to Drive Circuit Requirements sectionGo