SNAS305J July   2005  – March 2016 ADC121S021

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
      1. 9.4.1 Normal Mode
      2. 9.4.2 Shutdown Mode
  10. 10Applications Information
    1. 10.1 Application Information
      1. 10.1.1 Using the ADC121S021
        1. 10.1.1.1 Determining Throughput
      2. 10.1.2 ADC121S021 Transfer Function
      3. 10.1.3 Analog Inputs
      4. 10.1.4 Digital Inputs And Outputs
      5. 10.1.5 Power Management
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
    1. 11.1 Power Supply Noise Considerations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Device Nomenclature
    2. 13.2 Community Resources
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

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12 Layout

12.1 Layout Guidelines

Ground must be a low impedance connection for return currents to flow undisturbed back to their respective sources. Keep connections to the ground plane as short and direct as possible. When using vias to connect to the ground layer, use multiple vias in parallel to reduce impedance to ground.

A mixed-signal layout sometimes incorporates separate analog and digital ground planes that are tied together at one location; however, separating the ground planes is not necessary when analog, digital, and power supply circuitry into different PCB regions to prevent digital return currents from coupling into sensitive analog circuitry.

For best performance, dedicate an entire PCB layer to a ground plane and do not route any other signal traces on this layer. If ground plane separation is necessary, then make the connection at the ADC. Do not connect individual ground planes at multiple locations because this configuration creates ground loops. A single plane for analog and digital ground avoids ground loops.

If isolation is required in the application, isolate the digital signals between the ADC and controller, or provide the isolation form the controller to the remaining system. If an external crystal is used to provide the ADC clock, place the crystal and load capacitors directly to the ADC pins using short direct traces.

Supply pins must be bypassed with a low-ESR ceramic capacitor. Place the bypass capacitors as close as possible to the supply pins using short, direct traces. For optimum performance, use low-impedance connections on the ground-side connections of the bypass capacitors. Flow the supply current through the bypass capacitor pin first and then to the supply pin to make the bypassing most effective (also known as a Kelvin connection). If multiple ADCs are on the same PCB, use wide power supply traces or dedicated power-supply planes to minimize the potential of crosstalk between ADCs.

It is important that the SCLK input of the serial interface is free from noise and glitches. Even with relatively slow SCLK frequencies, short digital-signal rise and fall times may cause excessive ringing and noise. For best performance, keep the digital signal traces short, use termination resistors as needed, and ensure all digital signals are routed directly above the ground plane with minimal use of vias.

12.2 Layout Example

ADC121S021 ADC121S021_layout.gif Figure 22. ADC1210S21 Layout Example