CDCM7005QFN-EVM
采用 QFN 封装的 CDCM7005 评估模块
CDCM7005QFN-EVM
概述
TheCDCM7005QFN-EVM is an evaluation module designed to aid in evaluating the performance of the CDCM7005, which is a high-performance, low phase noise and low skew clock synchronizer that synchronizes voltage controlled crystal oscillator (VCXO) frequency to an external reference clock; generates very low phase noise (jitter) clock.
The PLL loop bandwidth and damping factor can be adjusted to meet different system requirements by selecting the external VCXO, loop filter components, frequency for PFD, and charge pump current.
As the system requires external components like a loop filter and VCXO, this EVM provides an excellent way to evaluate and modify the performance and parameters of the clock system in conjunction with the specific customer application.
特性
- Output frequency up to 1500 MHz
- Loop bandwidth can be selected as low as 10 Hz or less to clean the system's clock jitter
- Can be used as a simple 1:5 LVPECL buffer with output dividing options
- Differential outputs programmable by serial peripheral interface (SPI)
时钟抖动清除器和同步器
技术文档
| 类型 | 标题 | 下载最新的英文版本 | 日期 | |||
|---|---|---|---|---|---|---|
| 证书 | CDCM7005QFN-EVM EU Declaration of Conformity (DoC) | 2019年 1月 2日 | ||||
| EVM 用户指南 | CDCM7005 (QFN Package) EVM Users Guide (Rev. A) | 2005年 12月 19日 |