This reference design uses four UCC12050 high-efficiency, low-EMI, 5-kVRMS reinforced isolation, DC/DC converters on a single printed circuit board. The reference design includes additional provisions such as ferrite beads for optimized low-EMI emissions. Output voltages, VISO, can be selected for 3.3 V, 3.7 V, 5 V (default) and 5.4 V. Each of the four outputs includes a 100-mA, 500-mW load resistor commanding maximum output power by default but can easily be changed to accommodate any desired output load, up to 500 mW for any single converter. A single SMB input connector (J3) is included to allow easy and convenient connection to the input voltage source through a shielded input cable. The primary intent of this reference design is to investigate the impact that multiple high frequency converters have on EMI according to the CISPR 32, class-B test standard. Applications include isolated bias supplies for isolated data converters, amplifiers and motor drivers used in industrial, factory automation and grid infrastructure systems.
| Output voltage options | PMP22682.1 |
|---|---|
| Vin (Min) (V) | 4.5 |
| Vin (Max) (V) | 5.5 |
| Vout (Nom) (V) | 5 |
| Iout (Max) (A) | .1 |
| Output Power (W) | .5 |
| Isolated/Non-Isolated | Isolated |
| Input Type | DC |
| Topology | Other |
A fully assembled board has been developed for testing and performance validation only, and is not available for sale.
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Test results for the reference design, including efficiency graphs, test prerequisites and more
Detailed schematic diagram for design layout and components
Complete listing of design components, reference designators, and manufacturers/part numbers
Detailed overview of design layout for component placement
Files used for 3D models or 2D drawings of IC components
Design file that contains information on physical board layer of design PCB
PCB layer plot file used for generating PCB design layout
Includes TI products in the design and potential alternatives.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Test report | 5-VIN to 5-VOUT, 100-mA, low-EMI, 5-kVRMS Reinforced Isolation DC/DC Power Suppl | PDF | HTML | Sep. 27, 2021 |
| White paper | 以可靠且經濟實惠的隔離技術解決高電壓設計挑戰 (Rev. C) | PDF | HTML | Feb. 15, 2024 | |
| White paper | Addressing High-Volt Design Challenges w/ Reliable and Affordable Isolation Tech (Rev. C) | PDF | HTML | Sep. 26, 2023 | |
| White paper | 높은 신뢰도와 합리적인 가격대의 절연 기술 개발과 관련한 고전압 설계 문제의 해결 (Rev. B) | PDF | HTML | Sep. 19, 2023 |
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