現在提供此產品的更新版本
功能相同，但針腳輸出與所比較的裝置不同。
UCC27532-Q1
- Qualified for automotive applications
- AEC-Q100 qualified with the following results:
- Device temperature grade 1
- Low-cost gate driver (offering optimal solution for driving FET and IGBTs)
- Superior replacement to discrete transistor pair drive (providing easy interface with controller)
- CMOS compatible input-logic threshold (becomes fixed at VDD above 18V)
- Split outputs allow separate turnon and turnoff tuning
- Enable with Fixed TTL compatible threshold
- High 2.5A source and 5A sink peak-drive currents at 18V VDD
- Wide VDD range from 10V up to 35V
- Input pins capable of withstanding up to –5V DC below ground
- Output held low when inputs are floating or during VDD UVLO
- Fast propagation delays (17ns typical)
- Fast rise and fall times (15ns and 7ns typical with 1800pF load)
- Undervoltage lockout (UVLO)
- Used as a high-side or low-side driver (if designed with proper bias and signal isolation)
- Low-cost space-saving 6-pin DBV (SOT-23) package
- Operating temperature range of –40°C to 140°C
The UCC27532-Q1 device is a single-channel high-speed gate driver capable of effectively driving MOSFET and IGBT power switches by up to 2.5A source and 5A sink (asymmetrical drive) peak current. Strong sink capability in asymmetrical drive boosts immunity against parasitic Miller turnon effect. The UCC27532-Q1 device also features a split-output configuration where the gate-drive current is sourced through the OUTH pin and sunk through the OUTL pin. This pin arrangement allows the user to apply independent turnon and turnoff resistors to the OUTH and OUTL pins respectively and easily control the switching slew rates.
The driver has rail-to-rail drive capability and an extremely-small propagation delay of 17ns (typically).
The UCC27532-Q1 device has a CMOS-input threshold-centered 55% rise and 45% fall in regards of VDD at VDD below or equal 18V. When VDD is above 18V, the input threshold remains fixed at the maximum level.
The driver has an EN pin with a fixed TTL-compatible threshold. EN is internally pulled up; pulling EN low disables driver, while leaving it open provides normal operation. The EN pin can be used as an additional input with the same performance as the IN pin.
Leaving the input pin of driver open holds the output low. The logic behavior of the driver is shown in the Timing Diagram, Input/Output Logic Truth Table, and .
Internal circuitry on the VDD pin provides an undervoltage-lockout function that holds the output low until the VDD supply voltage is within operating range.
The UCC27532-Q1 driver is offered in a 6-pin standard SOT-23 (DBV) package. The device operates over a wide temperature range of –40°C to 140°C.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | UCC27532-Q1 2.5A and 5A, 35VMAX VDD Fet and IGBT Single-Gate Driver datasheet (Rev. C) | PDF | HTML | 2024/9/27 | ||
| 應用說明 | Review of Different Power Factor Correction (PFC) Topologies' Gate Driver Needs | PDF | HTML | 2024/1/22 | |||
| 應用說明 | Using a Single-Output Gate-Driver for High-Side or Low-Side Drive (Rev. B) | PDF | HTML | 2023/9/8 | |||
| 應用說明 | Benefits of a Compact, Powerful, and Robust Low-Side Gate Driver | PDF | HTML | 2021/11/10 | |||
| Application brief | External Gate Resistor Selection Guide (Rev. A) | 2020/2/28 | ||||
| Application brief | Understanding Peak IOH and IOL Currents (Rev. A) | 2020/2/28 | ||||
| Application brief | How to overcome negative voltage transients on low-side gate drivers' inputs | 2019/1/18 | ||||
| Application brief | High-Side Cutoff Switches for High-Power Automotive Applications (Rev. A) | 2018/11/26 | ||||
| 更多文件說明 | Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) | 2018/10/29 | ||||
| Application brief | Low-Side Gate Drivers With UVLO Versus BJT Totem-Pole | 2018/3/16 |
設計與開發
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UCC57142EVM — UCC57142 評估模組
SLURB21 — UCC2753X Schematic Review Template
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SOT-23 (DBV) | 6 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。