產品詳細資料

Bits (#) 2 Data rate (max) (Mbps) 24 Topology Open drain, Push-Pull Direction control (typ) Auto-direction Vin (min) (V) 1.65 Vin (max) (V) 3.6 Vout (min) (V) 2.3 Vout (max) (V) 5.5 Applications GPIO, I2C, MDIO, SDIO, SMBus, UART Features Edge rate accelerator, Output enable, Partial power down (Ioff), Vcc isolation Prop delay (ns) 4.4 Technology family TXS Supply current (max) (mA) 0.025 Rating Catalog Operating temperature range (°C) -40 to 85
Bits (#) 2 Data rate (max) (Mbps) 24 Topology Open drain, Push-Pull Direction control (typ) Auto-direction Vin (min) (V) 1.65 Vin (max) (V) 3.6 Vout (min) (V) 2.3 Vout (max) (V) 5.5 Applications GPIO, I2C, MDIO, SDIO, SMBus, UART Features Edge rate accelerator, Output enable, Partial power down (Ioff), Vcc isolation Prop delay (ns) 4.4 Technology family TXS Supply current (max) (mA) 0.025 Rating Catalog Operating temperature range (°C) -40 to 85
X2SON (DQE) 8 1.4 mm² (1.4 mm × 1 mm) SSOP (DCT) 8 11.8 mm² (2.95 mm × 4 mm) X2SON (DQM) 8 2.16 mm² (1.8 mm × 1.2 mm) VSSOP (DCU) 8 6.2 mm² (2 mm × 3.1 mm) DSBGA (YZP) 8 2.8125 mm² (— mm × — mm) X1QFN (DTT) 8 1.95 mm² (1.95 mm × 1 mm)
  • No direction-control signal needed
  • Maximum data rates:
    • 24Mbps (push pull)
    • 2Mbps (open drain)
  • Available in the Texas Instruments NanoStar™ integrated circuit package
  • 1.65V to 3.6V on A port and 2.3V to 5.5V on B port (VCCA ≤ VCCB)
  • VCC isolation feature: if either VCC input is at GND, both ports are in the High-Impedance state
  • No power-supply sequencing required: either VCCA or VCCB can be ramped first
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 100mA per JESD 78, Class II
  • ESD protection exceeds JESD 22:
    • A port:
      • 2500V Human-Body Model (A114-B)
      • 250V Machine Model (A115-A)
      • 1500V Charged-Device Model (C101)
    • B port:
      • 8kV Human-Body Model (A114-B)
      • 250V Machine Model (A115-A)
      • 1500V Charged-Device Model (C101)
  • No direction-control signal needed
  • Maximum data rates:
    • 24Mbps (push pull)
    • 2Mbps (open drain)
  • Available in the Texas Instruments NanoStar™ integrated circuit package
  • 1.65V to 3.6V on A port and 2.3V to 5.5V on B port (VCCA ≤ VCCB)
  • VCC isolation feature: if either VCC input is at GND, both ports are in the High-Impedance state
  • No power-supply sequencing required: either VCCA or VCCB can be ramped first
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 100mA per JESD 78, Class II
  • ESD protection exceeds JESD 22:
    • A port:
      • 2500V Human-Body Model (A114-B)
      • 250V Machine Model (A115-A)
      • 1500V Charged-Device Model (C101)
    • B port:
      • 8kV Human-Body Model (A114-B)
      • 250V Machine Model (A115-A)
      • 1500V Charged-Device Model (C101)

This two-bit non-inverting translator is a bidirectional voltage-level translator and can be used to establish digital switching compatibility between mixed-voltage systems. It uses two separate configurable power-supply rails, with the A ports supporting operating voltages from 1.65V to 3.6V while it tracks the VCCA supply, and the B ports supporting operating voltages from 2.3V to 5.5V while it tracks the VCCB supply. This allows the support of both lower and higher logic signal levels while providing bidirectional translation capabilities between any of the 1.8V, 2.5V, 3.3V, and 5V voltage nodes.

When the output-enable (OE) input is low, all I/Os are placed in the high-impedance state, which significantly reduces the power-supply quiescent current consumption.

To put the device in the high-impedance state during power up or power down, tie OE to GND through a pulldown resistor; the current-sourcing capability of the driver determines the minimum value of the resistor.

This two-bit non-inverting translator is a bidirectional voltage-level translator and can be used to establish digital switching compatibility between mixed-voltage systems. It uses two separate configurable power-supply rails, with the A ports supporting operating voltages from 1.65V to 3.6V while it tracks the VCCA supply, and the B ports supporting operating voltages from 2.3V to 5.5V while it tracks the VCCB supply. This allows the support of both lower and higher logic signal levels while providing bidirectional translation capabilities between any of the 1.8V, 2.5V, 3.3V, and 5V voltage nodes.

When the output-enable (OE) input is low, all I/Os are placed in the high-impedance state, which significantly reduces the power-supply quiescent current consumption.

To put the device in the high-impedance state during power up or power down, tie OE to GND through a pulldown resistor; the current-sourcing capability of the driver determines the minimum value of the resistor.

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技術文件

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 TXS0102 2-Bit Bidirectional Voltage-Level Translator for Open-Drain and Push-Pull Applications datasheet (Rev. L) PDF | HTML 2026/1/16
應用說明 Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 2024/7/12
應用說明 Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 2024/7/3
Application brief Integrated vs. Discrete Open Drain Level Translation PDF | HTML 2024/1/9
應用說明 Leveraging Edge Rate Accelerators with Auto-Sensing Level Shifters PDF | HTML 2023/9/29
Application brief Future-Proofing Your Level Shifter Design with TI's Dual Footprint Packages PDF | HTML 2023/9/5
應用說明 Do’s and Don’ts for TXB and TXS Voltage Level-Shifters with Edge Rate Accelerato PDF | HTML 2023/6/28
Product overview Enabling System on Module Industrial PC Connectivity With Level Translation PDF | HTML 2023/4/3
Application brief Enabling Next Generation Processors, FPGA, and ASSP with Voltage Level Translat PDF | HTML 2023/1/17
Application brief Enabling Smart Solar Inverter Designs with Level Translation PDF | HTML 2022/10/31
Product overview Translate Voltages for I2C for PCA9306 LSF0102 TXS0102 PDF | HTML 2022/9/14
Product overview Translate Voltages for I2C PDF | HTML 2022/6/2
Application brief Translate Voltages for MDIO PDF | HTML 2021/7/16
選擇指南 Voltage Translation Buying Guide (Rev. A) 2021/4/15
技術文章 How smart thermostats get their degrees PDF | HTML 2020/3/9
應用說明 Effects of pullup and pulldown resistors on TXS and TXB devices (Rev. A) 2018/3/28
應用說明 Factors Affecting VOL for TXS and LSF Auto-bidirectional Translation Devices 2017/11/19
應用說明 Biasing Requirements for TXS, TXB, and LSF Auto-Bidirectional Translators 2017/10/30
應用說明 A Guide to Voltage Translation With TXS-Type Translators 2010/6/29

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5-8-LOGIC-EVM — 適用於 5 針腳至 8 針腳 DCK、DCT、DCU、DRL 和 DBV 封裝的通用邏輯評估模組

靈活的 EVM 旨在支援任何針腳數為 5 至 8 支且採用 DCK、DCT、DCU、DRL 或 DBV 封裝的裝置。
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TXS-EVM — 適用於單通道、雙通道、四通道和八通道裝置的轉換器系列評估模組

TXS-EVM 旨在支援單通道、雙通道、四通道和八通道 TXS 裝置。TXS 產品屬於自動雙向電壓位準轉換系列,運作電壓介於 1.2V 與 5.5 V,旨在支援不同產業中的各種通用電壓位準轉換應用。

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TXS0102 IBIS Model (Rev. B)

SCEM542B.ZIP (96 KB) - IBIS 模型
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封裝 針腳 CAD 符號、佔位空間與 3D 模型
X2SON (DQE) 8 Ultra Librarian
SSOP (DCT) 8 Ultra Librarian
X2SON (DQM) 8 Ultra Librarian
VSSOP (DCU) 8 Ultra Librarian
DSBGA (YZP) 8 Ultra Librarian
X1QFN (DTT) 8 Ultra Librarian

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