TXE8124-Q1
- AEC-Q100
qualified for automotive applications:
- Temperature grade 1: –40°C to +125°C, TA
- Functional safety-capable
- Operating supply voltage range of 1.65V to 5.5V
- Low standby current consumption of 2.3µA typical
- SPI SCLK Frequency
- 10MHz from 3.3V to 5.5V
- 5MHz from 1.65V to 5.5V
- SPI daisy-chain supported
- SPI read and write with burst mode
- Multi-port SPI command to configure multiple ports simultaneously
- IOFF supported input port pins
- Active-low reset input (RESET)
- Open-drain active-low interrupt output
(INT)
- Interrupt mask and status per I/O
- Interrupt status per port
- Built-in fail-safe I/O feature
- Individual I/O configuration for
- Input and Output function
- Polarity inversion
- Output push-pull and open-drain selection
- Integrated pull-up or pull-down selection
- Bus-hold feature to maintain last I/O state
- Glitch filter enable selection
- Wettable flank VQFN package
- Latched outputs with 10mA drive capability for directly driving LEDs
- Latch-up performance exceeds 100mA per AEC Q100-004
- ESD protection
exceeds AEC - Q100 requirements
- 2000V Human-body model (AEC - Q100-002)
- 1000V Charged-device model (AEC - Q100-011)
The TXE8124-Q1 devices provide general purpose parallel input/output (I/O) expansion for the four wire Serial Peripheral Interface (SPI) protocol and is designed for 1.65V to 5.5V VCC operation. The TXE8124-Q1 supports both standard point-to-point communication along with daisy-chaining of multiple devices.
The device supports 10MHz from 3.3V to 5.5V and 5MHz from 1.65V to 5.5V. I/O expanders, such as the TXE8124-Q1, are designed for when additional I/Os are needed for switches, sensors, push-buttons, LEDs, and fans.
The TXE8124-Q1 devices has 3 I/O ports of 8 IOs each, which include additional features designed to enhance the I/O performance in terms of speed, power consumption, and flexibility. These include per I/O programmable open-drain or push-pull outputs, programmable pull-up and pull-down resistors, bus-hold latchable inputs, maskable interrupt, interrupt status register, glitch filter and a fail-safe register mode which is enabled by the FAIL-SAFE pin.
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技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | TXE8124-Q1 Automotive 24-Bit SPI Bus I/O Expander with Interrupt Output, Reset Input, and I/O Configuration Registers datasheet (Rev. B) | PDF | HTML | 2026/7/31 | ||
| 應用說明 | Application of TXE81XX SPI to GPIO Expander Fail-Safe Feature | PDF | HTML | 2026/6/12 | |||
| 應用說明 | How to Use SPI Daisy Chaining with TXE81XX Devices (Rev. A) | PDF | HTML | 2026/5/8 | |||
| 功能安全資訊 | TXE8124-Q1 Functional Safety FIT Rate, FMD and Pin FMA | PDF | HTML | 2026/4/16 | |||
| 應用說明 | Scalable SPI GPIO Expansion for Automotive ECU Design | PDF | HTML | 2026/3/19 | |||
| Application brief | Understanding the SPI Bus | PDF | HTML | 2025/8/22 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
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|---|---|---|
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訂購與品質
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