TPSM82912
- Low output noise < 20 µVRMS(100 Hz to 100 kHz)
- Low output voltage ripple < 10 µVRMS after ferrite bead
- High PSRR of > 65 dB (up to 100 kHz)
- 2.2-MHz or 1-MHz fixed frequency peak current mode control
- Synchronizable with external clock (optional)
- Integrated loop compensation supports ferrite bead for second stage L-C filter with 30-dB attenuation (optional)
- Spread spectrum modulation (optional)
- 3.0-V to 17-V input voltage range
- 0.8-V to 5.5-V output voltage range
- 57-mΩ/20-mΩ RDSon
- Output voltage accuracy of ±1%
- Precise enable input allows
- User-defined undervoltage lockout
- Exact sequencing
- Adjustable soft start
- Power-good output
- Output discharge (optional)
- –40°C to 125°C junction temperature range
- –55°C to 125°C for -ET versions
- Create a custom design using the TPSM8291x with the WEBENCH Power Designer
The TPSM8291x devices are a family of high-efficiency, low-noise and low-ripple current mode synchronous buck power modules. The devices are ideal for noise sensitive applications that would normally use an LDO for post regulation such as high-speed ADCs, clock and jitter cleaner, serializer, de-serializer, and radar applications.
The devices operate at a fixed switching frequency of 2.2 MHz or 1 MHz and can be synchronized to an external clock.
To further reduce the output voltage ripple, the device integrates loop compensation to operate with an optional second-stage ferrite bead L-C filter. This feature allows an output voltage ripple below 10 µVRMS.
Low-frequency noise levels, similar to a low-noise LDO, are achieved by filtering the internal voltage reference with an integrated capacitor on the NR/SS pin. An external capacitor can be added to the module for additional filtering.
The optional spread spectrum modulation scheme spreads the DC/DC switching frequency over a wider span, which lowers the mixing spurs.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | TPSM8291x 3-V to 17-V, 2-A/3-A Low-Noise and Low-Ripple Buck Power Module with Integrated Ferrite Bead Filter Compensation datasheet (Rev. C) | PDF | HTML | 2023/7/18 | ||
| Application brief | Solving Power Design Challenges in Semiconductor Test and ATE Applications (Rev. A) | PDF | HTML | 2025/12/2 | |||
| 白皮書 | 以低雜訊電源裝置簡化電源架構 (Rev. A) | PDF | HTML | Download English Version (Rev.A) | PDF | HTML | 2024/11/19 | |
| 技術文章 | 如何以低雜訊和低漣波設計技術強化電源與訊號完整性 | PDF | HTML | Download English Version | PDF | HTML | 2024/10/4 | |
| 白皮書 | 簡化高壓系統的電源轉換 | PDF | HTML | Download English Version | PDF | HTML | 2023/11/10 | |
| Application brief | Solving power design challenges in oscilloscope applications | PDF | HTML | 2023/10/31 | |||
| Application brief | Solving Power Design Challenges in Medical Imaging Applications | PDF | HTML | 2023/7/12 | |||
| 證書 | TPSM82912EVM EU Declaration of Conformity (DoC) | 2022/9/27 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
TPSM82912EVM — 適用於 2-A 低雜訊與低漣波降壓模組的 TPSM82912 評估模組
TIDA-010962 — 自動測試設備 (ATE) 80V 離散式浮動 VI 參考設計
此參考設計展現四象限離散式浮動電壓與電流 (VI) 設計。電壓輸出支援 ±40V 和 0V 至 80V 範圍，並提供 500mA、10mA 和 10μA 三種電流範圍。此設計可在強制電壓 (FV)、強制電流 (FI)、緩衝器及具有類比回饋迴路的 Gang 模式下運作。憑藉 20 位元強制數位轉類比轉換器 (DAC) 和 18 位元、2 通道類比轉數位轉換器 (ADC) 以及精密訊號鏈，該參考設計可實現校準後控制與測量具備 0.01% 準確度。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| B0QFN (RDU) | 28 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。