TPS7N49
- VOUT range: 0.5V to 3.6V
- Ultra-low VIN range: 0.75V to 6.0V
- VBIAS range: 2.7V to 6.0V
- Low dropout: 100mV typical at 3.0A, VBIAS = 5V
- Power-good (PG) output allows supply monitoring or provides a sequencing signal for other supplies
- 2% accuracy
- VBIAS permits low VIN operation with good transient response
- Stable with any output capacitor ≥ 10µF
- Available in a small, 2mm × 2mm × 1mm WSON-10 package
The TPS7N49 low-dropout (LDO) linear regulator provides an easy-to-use robust power management design for a wide variety of applications. The user-programmable soft-start minimizes stress on the input power source by reducing capacitive inrush current on start-up. The soft-start is monotonic and designed for powering many different types of processors and application-specific integrated circuits (ASICs). The enable input and power-good output allow easy sequencing with external regulators. This flexibility enables a design to be configured that meets the sequencing requirements of many applications. Field-programmable gate arrays (FPGAs), digital signal processors (DSPs), and other applications with special start-up requirements are some examples that benefit from this flexibility.
A precision reference and error amplifier deliver 2% accuracy. The device is stable with any type of capacitor greater than or equal to 10µF, and is fully specified for TJ = –40°C to +125°C. The TPS7N49 is offered in a small, 2mm × 2mm, WSON-10 package, yielding a highly compact total design size.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | TPS7N49 3.0A, Low-Dropout Linear Regulator With Programmable Soft-Start datasheet | PDF | HTML | 2025/11/18 | ||
| 證書 | TPS7N49EVM-172 EU Declaration of Conformity (DoC) | 2025/5/28 |
設計與開發
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| WSON (DSQ) | 10 | Ultra Librarian |
訂購與品質
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