TPS7A47-Q1

現行

具有啟用功能車用 1A、36V、低雜訊、高 PSRR、低壓差電壓穩壓器

產品詳細資料

Rating Automotive Vin (max) (V) 36 Vin (min) (V) 3 Iout (max) (A) 1 Output options Adjustable Output, Fixed Output Vout (max) (V) 34 Vout (min) (V) 1.4 Noise (µVrms) 4 PSRR at 100 KHz (dB) 60 Iq (typ) (mA) 0.58 Features Enable Thermal resistance θJA (°C/W) 31.1 Load capacitance (min) (µF) 10 Regulated outputs (#) 1 Accuracy (%) 2.5 Dropout voltage (Vdo) (typ) (mV) 216 Operating temperature range (°C) -40 to 125
Rating Automotive Vin (max) (V) 36 Vin (min) (V) 3 Iout (max) (A) 1 Output options Adjustable Output, Fixed Output Vout (max) (V) 34 Vout (min) (V) 1.4 Noise (µVrms) 4 PSRR at 100 KHz (dB) 60 Iq (typ) (mA) 0.58 Features Enable Thermal resistance θJA (°C/W) 31.1 Load capacitance (min) (µF) 10 Regulated outputs (#) 1 Accuracy (%) 2.5 Dropout voltage (Vdo) (typ) (mV) 216 Operating temperature range (°C) -40 to 125
VQFN (RGW) 20 25 mm² (5 mm × 5 mm)
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to 125°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C4A
  • Input Voltage: 3 V to 35 V
  • Operating Junction Temperature: –40°C to +145°C
  • Output Voltage Noise:
    4.2 µVRMS (10 Hz–100 kHz)
  • Power-Supply Rejection Ratio:
    • 82 dB (100 Hz)
    • ≥ 55 dB (10 Hz–10 MHz)
  • Two Output Voltage Modes:
    • ANY-OUT™ Version (User-Programmable Output via PCB Layout):
      • Output Voltage: 1.4 V to 20.5 V
    • Adjustable Operation:
      • Output Voltage: 1.4 V to 34 V
  • Output Current: 1 A
  • Thermal resistance: θJA = 31.1°C/W
  • Dropout Voltage: 307 mV at 1 A
  • CMOS Logic Level-Compatible Enable Pin
  • Built-In Fixed Current Limit and
    Thermal Shutdown
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to 125°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C4A
  • Input Voltage: 3 V to 35 V
  • Operating Junction Temperature: –40°C to +145°C
  • Output Voltage Noise:
    4.2 µVRMS (10 Hz–100 kHz)
  • Power-Supply Rejection Ratio:
    • 82 dB (100 Hz)
    • ≥ 55 dB (10 Hz–10 MHz)
  • Two Output Voltage Modes:
    • ANY-OUT™ Version (User-Programmable Output via PCB Layout):
      • Output Voltage: 1.4 V to 20.5 V
    • Adjustable Operation:
      • Output Voltage: 1.4 V to 34 V
  • Output Current: 1 A
  • Thermal resistance: θJA = 31.1°C/W
  • Dropout Voltage: 307 mV at 1 A
  • CMOS Logic Level-Compatible Enable Pin
  • Built-In Fixed Current Limit and
    Thermal Shutdown

The TPS7A47-Q1 device is a positive voltage (35 V), ultra-low-noise (4.2 µVRMS) low-dropout linear regulator (LDO) capable of sourcing a 1-A load.

The TPS7A47-Q1 output voltage can be configured with a user-programmable printed circuit board (PCB) layout (up to 20.5 V), or adjustable (up to 34 V) with external feedback resistors.

The TPS7A47-Q1 is designed with bipolar technology primarily for high-accuracy, high-precision instrumentation applications where clean voltage rails are critical to maximize system performance. This feature makes the device ideal for powering operational amplifiers, analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and other high-performance analog circuitry.

In addition, the TPS7A47-Q1 is ideal for post dc-dc converter regulation. By filtering out the output voltage ripple inherent to dc-dc switching conversions, maximum system performance is ensured in sensitive instrumentation, audio, and RF applications.

The TPS7A47-Q1 device is a positive voltage (35 V), ultra-low-noise (4.2 µVRMS) low-dropout linear regulator (LDO) capable of sourcing a 1-A load.

The TPS7A47-Q1 output voltage can be configured with a user-programmable printed circuit board (PCB) layout (up to 20.5 V), or adjustable (up to 34 V) with external feedback resistors.

The TPS7A47-Q1 is designed with bipolar technology primarily for high-accuracy, high-precision instrumentation applications where clean voltage rails are critical to maximize system performance. This feature makes the device ideal for powering operational amplifiers, analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and other high-performance analog circuitry.

In addition, the TPS7A47-Q1 is ideal for post dc-dc converter regulation. By filtering out the output voltage ripple inherent to dc-dc switching conversions, maximum system performance is ensured in sensitive instrumentation, audio, and RF applications.

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TPS7A88-Q1 現行 車用 1-A、低雜訊、高準確度、雙通道可調式超低壓降電壓穩壓器 A lower noise, higher PSRR dual-channel LDO.

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 TPS7A47-Q1 35-V, 1-A, 4.2-µVRMS, RF LDO Voltage Regulator datasheet PDF | HTML 2017/8/22
白皮書 Reduce System Noise Using Parallel LDOs PDF | HTML 2025/11/3
應用說明 An empirical analysis of the impact of board layout on LDO thermal performance (Rev. A) PDF | HTML 2025/9/23
白皮書 Parallel LDO Architecture Design Using Ballast Resistors PDF | HTML 2022/12/14
白皮書 Comprehensive Analysis and Universal Equations for Parallel LDO's Using Ballast PDF | HTML 2022/12/13
應用說明 A Topical Index of TI LDO Application Notes (Rev. F) 2019/6/27
電子書 LDO Basics (Rev. A) 2019/4/8
技術文章 LDO basics: dropout PDF | HTML 2017/3/16
使用指南 TPS7A47xxEVM-094 Evaluation Module (Rev. A) 2013/8/2

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開發板

TPS7A4701EVM-094 — TPS7A4701 射頻低壓差 (LDO) 電壓穩壓器評估模組

The TPS7A4701EVM-094 is a fully assembled and tested evaluation module (EVM) for evaluating the TPS7A47 ultra-low-noise low-dropout (LDO) regulator at adjustable output voltages that range from 1.4 V to 34 V. The EVM circuit is configured to be a reference design for engineering applications (...)
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模擬型號

TPS7A4701 PSpice Transient Model (Rev. B)

SBVM364B.ZIP (42 KB) - PSpice 模型
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計算工具

PARALLEL-LDO-CALC — Parallel low-dropout (LDO) calculator

並聯低壓差 (LDO) 計算器是以 Microsoft® Excel® 為基礎的工具,可為使用鎮流器電阻器的並聯 LDO 穩壓器提供最壞情況分析。此工具可幫助使用者判斷所需的並聯 LDO 穩壓器最小數量,以及適合系統要求集的最佳鎮流器電阻。

在並聯應用中使用的常用 LDO 穩壓器的產品規格書資訊會預先填入計算機中。使用者可根據自己的系統需求,評估最符合其系統需求的 LDO 穩壓器裝置。

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VQFN (RGW) 20 Ultra Librarian

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