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TPS65400

現行

具 PMBus/I2C 介面的 4.5 V 至 18 V 輸入、4 A / 4 A / 2 A / 2 A 同步四重轉換器

產品詳細資料

Rating Catalog Topology Buck Iout (max) (A) 4 Vin (max) (V) 18 Vin (min) (V) 4.5 Vout (max) (V) 16 Vout (min) (V) 0.8 Features Adaptive/Dynamic Voltage Scaling, Enable, Forced PWM, Frequency synchronization, I2C, Overcurrent protection, PMBus, Phase Interleaving, Power good, Prebias startup, Soft-start adjustable, Synchronous rectification, UVLO adjustable Control mode current mode Operating temperature range (°C) -40 to 85 Iq (typ) (A) 0.008 Duty cycle (max) (%) 92.5 Sector Test & measurement
Rating Catalog Topology Buck Iout (max) (A) 4 Vin (max) (V) 18 Vin (min) (V) 4.5 Vout (max) (V) 16 Vout (min) (V) 0.8 Features Adaptive/Dynamic Voltage Scaling, Enable, Forced PWM, Frequency synchronization, I2C, Overcurrent protection, PMBus, Phase Interleaving, Power good, Prebias startup, Soft-start adjustable, Synchronous rectification, UVLO adjustable Control mode current mode Operating temperature range (°C) -40 to 85 Iq (typ) (A) 0.008 Duty cycle (max) (%) 92.5 Sector Test & measurement
VQFN (RGZ) 48 49 mm² (7 mm × 7 mm)
  • Efficiency up to 95% for each switching regulator
  • Switching regulator specifications:
    • Input voltage range: 4.5 to 18 V
    • VOUT range: 0.6 V-90%VIN
    • SW1, SW2 IOUT: 4-A max
    • SW3, SW4 IOUT: 2-A max
  • Prebias start-up algorithm minimizes voltage dip during start-up
  • Internal undervoltage lockout (UVLO), overcurrent protection (OCP), overvoltage protection (OVP), and overtemperature protection (OTP)
  • AECQ-100 grade 1 option
  • Thermally enhanced 7-mm × 7-mm 48-pin, 0.5-mm pitch VQFN package
  • Pin accessible features:
    • Adjustable VOUT with external feedback resistors
    • Sequencing control through precision enable pins for each switcher
    • Resistor adjustable PWM switching frequency from 275 kHz to 2.2 MHz
    • Clock sync input and clock output
    • Soft-start delay through external capacitor
    • Current sharing between SW1 and SW2 and between SW3 and SW4 allows support of higher current needs if required
  • PMBus runtime control and status
    • Runtime voltage positioning through adjustment of VREF
    • Enable and disable of each switcher
    • Fault and status monitoring
  • User-configurable PMBus/I2C options, saved in EEPROM
    • Power supply turn-on and turn-off sequencing
    • Sequencing can be based on fixed time delays or PGOOD dependence
    • Initial voltage positioning through VREF configuration
    • PWM frequency adjustment for each switcher
    • Individual PWM phase alignment for each switcher to minimize ripple and capacitor size
    • Adjustable current limit on each regulator enables size and cost optimization of inductors
    • Soft-start time
  • Efficiency up to 95% for each switching regulator
  • Switching regulator specifications:
    • Input voltage range: 4.5 to 18 V
    • VOUT range: 0.6 V-90%VIN
    • SW1, SW2 IOUT: 4-A max
    • SW3, SW4 IOUT: 2-A max
  • Prebias start-up algorithm minimizes voltage dip during start-up
  • Internal undervoltage lockout (UVLO), overcurrent protection (OCP), overvoltage protection (OVP), and overtemperature protection (OTP)
  • AECQ-100 grade 1 option
  • Thermally enhanced 7-mm × 7-mm 48-pin, 0.5-mm pitch VQFN package
  • Pin accessible features:
    • Adjustable VOUT with external feedback resistors
    • Sequencing control through precision enable pins for each switcher
    • Resistor adjustable PWM switching frequency from 275 kHz to 2.2 MHz
    • Clock sync input and clock output
    • Soft-start delay through external capacitor
    • Current sharing between SW1 and SW2 and between SW3 and SW4 allows support of higher current needs if required
  • PMBus runtime control and status
    • Runtime voltage positioning through adjustment of VREF
    • Enable and disable of each switcher
    • Fault and status monitoring
  • User-configurable PMBus/I2C options, saved in EEPROM
    • Power supply turn-on and turn-off sequencing
    • Sequencing can be based on fixed time delays or PGOOD dependence
    • Initial voltage positioning through VREF configuration
    • PWM frequency adjustment for each switcher
    • Individual PWM phase alignment for each switcher to minimize ripple and capacitor size
    • Adjustable current limit on each regulator enables size and cost optimization of inductors
    • Soft-start time

The TPS65400 is an integrated PMU optimized for applications requiring small form factor and high power conversion efficiency, enabling small space-constrained equipment with high ambient operating temperature without cooling. The device provides high-power efficiency at a system level by enabling a single stage conversion from an intermediate distribution bus with an optimized combination of regulators.

The TPS65400 is an integrated PMU optimized for applications requiring small form factor and high power conversion efficiency, enabling small space-constrained equipment with high ambient operating temperature without cooling. The device provides high-power efficiency at a system level by enabling a single stage conversion from an intermediate distribution bus with an optimized combination of regulators.

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 TPS65400 4.5- to 18-V Input Flexible Power Management Unit With PMBus/I2C Interface datasheet (Rev. E) PDF | HTML 2022/3/17
應用說明 How to Calculate the Load Pole and ESR Zero When Using Hybrid Output Capacitors (Rev. A) 2019/4/2

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

TPS65400EVM-678 — TPS65400EVM 評估模組

TPS65400EVM-678 評估模組 (EVM) 是一個已完成組裝且經過測試的電路,用於評估 TPS65400。此 EVM 的最大 DC 輸出電流為 4A、4A、2A 與 2A。此 EVM 包含輸入和輸出連接器以及控制跨接器,可輕鬆評估裝置功能。它還具備 EN1、EN2 與 EN_SW 跳線,以啟用與停用降壓與電源開關。

使用指南: PDF | HTML
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驅動程式或資料庫

SLVC604 — LGPL Library Source Used by PI-Commander-PMU

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開發模組 (EVM) 的 GUI

SLVC603 — PI-Commander-PMU EVM GUI

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模擬型號

TPS65400 PSpice Average Model

SLVMAI6.ZIP (91 KB) - PSpice 模型
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模擬型號

TPS65400 PSpice Transient Model

SLVMAI5.ZIP (73 KB) - PSpice 模型
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模擬型號

TPS65400 TINA-TI Transient Reference Design

SLVMC03.TSC (139 KB) - TINA-TI 參考設計
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模擬型號

TPS65400 TINA-TI Transient Spice Model

SLVMC04.ZIP (19 KB) - TINA-TI Spice 模型
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參考設計

PMP11414 — 適用於空間有限的應用的精巧型數位四路 4/4/2/2A 負載點參考設計

PMP11414 參考設計具備 TPS65400 四路 4/4/2/2A 輸出負載點,並採用小巧的 0.65" x 0.875" 解決方案尺寸 (16.5mm x 22.2mm)。TPS65400 將四個降壓穩壓器完全整合至小型 7mm x 7mm QFN 封裝中。同時具備 PMBus 功能,可靈活控制與配置。  PMP11414 展現高效率和智慧,可提供靈活的裕度與排序功能。

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參考設計

TIDEP0081 — 使用 66AK2L06 JESD204B 連接 ADC32RF80 的寬頻接收器參考設計

對於目前使用 FPGA 或 ASIC 將高速資料轉換器連接至基頻處理器的寬頻接收器系統開發人員而言,若需加快上市時程、提升效能並大幅降低成本、功耗與體積,這項參考設計即為理想解決方案。本參考設計包含首款廣泛可用、整合 JESD204B 介面與數位前端處理 (DFE) 的處理器。將 ADC32RF80 連接至 DAC38J84,能為航太與國防、測試與量測以及工業應用提供高效率解決方案。
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封裝 針腳 CAD 符號、佔位空間與 3D 模型
VQFN (RGZ) 48 Ultra Librarian

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