TPLD2001
- Operating characteristics
- Extended temperature range: -40°C to 125°C
- Wide supply voltage range: 1.71V to 5.5V
- Configurable macro-cells
- 2-, 3-, and 4-bit lookup tables (LUT)
- D-type flip-flops and latches with and without reset/set option
- 8-bit shift register
- 16-bit pattern generator
- 8-state state machine
- Counters and delay generators
- PWM generators
- Watchdog timer
- Programmable deglitch filter or edge detector
- Discrete analog comparators
- Multi-channel sampling analog comparator with multi-voltage reference select
- Voltage reference and Analog temperature sensor
- Analog multiplexers
- Oscillators
- Flexible digital I/O features
- All digital signals can be routed to any GPIO
- Digital input modes: digital in with and without Schmitt-trigger, low-voltage digital in
- Digital output modes: push-pull, open-drain NMOS, tri-state
- Development tools
- TPLD2001 evaluation module
- TPLD programmer
- InterConnect Studio
- In-line programming capable
The TPLD2001 is part of the TI Programmable Logic Device (TPLD) family of devices that feature versatile programmable logic ICs with combinational logic, sequential logic, and analog blocks. TPLD provides an integrated, compact, low power design to implement common system functions, such as timing delays, voltage monitors, system resets, power sequencers, I/O expanders, and more. This cost-optimized device offers a rich set of functionality in a small form factor, supports an extended temperature range from -40°C to 125°C, and operates with supply voltages ranging from 1.71V to 5.5V.
System designers can create circuits and configure the macro-cells, I/O pins, and interconnections by temporarily emulating the non-volatile memory or by permanently programming the one-time programmable (OTP) via InterConnect Studio. The TPLD2001 is supported by an extensive hardware and software ecosystem with application notes, reference designs and design examples. Visit ti.com for more information and access to design tools.
技術文件
設計與開發
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TPLD2001-DGS-EVM — TPLD2001 評估模組（DGS 封裝）
TPLD2001DGS 評估模組 (EVM) 屬於 TI 可編程邏輯裝置 (TPLD) 系列，該系列具備多功能可編程邏輯 IC，整合了組合邏輯、順序邏輯及混合訊號功能，提供小體積、低功耗的整合性設計，用以執行常見的系統功能，例如定時延遲、電壓監控、系統重設、電源序列器及 I/O 擴展器。
TPLD2001 可協助使用者配置 TPLD2001DGS 產品，且不需將產品焊接至電路板。使用者可運用 InterConnect Studio (ICS) 進行快速評估、開發、模擬和編程設計工作。編程後，即可從插座中移除 TPLD 裝置，並將其置於使用者的系統中。
TPLD2001-RJY-EVM — TPLD2001 評估模組（RJY 封裝）
TPLD2001RJY 評估模組 (EVM) 屬於 TI 可編程邏輯裝置 (TPLD) 系列，該系列具備多功能可編程邏輯 IC，整合了組合邏輯、順序邏輯及混合訊號功能，提供小體積、低功耗的整合性設計，用以執行常見的系統功能，例如定時延遲、電壓監控、系統重設、電源序列器及 I/O 擴展器。
TPLD2001 可協助使用者配置 TPLD2001RJY 產品，且不需將產品焊接至電路板。使用者可運用 InterConnect Studio (ICS) 進行快速評估、開發、模擬和編程設計工作。編程後，即可從插座中移除 TPLD 裝置，並將其置於使用者的系統中。
INTERCONNECT-STUDIO — InterConnect Studio
InterConnect Studio (ICS) 是一款易於使用的圖形介面工具，可搭配 TI 的可編程邏輯裝置 (TPLD) 使用。軟體提供直覺的拖放介面，可在幾分鐘內輕鬆設計、模擬、配置 TPLD 並對其進行編程。此獨立工具適用於多種作業系統，而線上版本則支援從任何位置進行 TPLD 開發。
TPLD-ACADEMY — Training resources related to InterConnect Studio and TPLD
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| UQFN (RJY) | 20 | Ultra Librarian |
| VSSOP (DGS) | 20 | Ultra Librarian |