產品詳細資料

CPU 1 C28, 1 CLA Frequency (MHz) 160 Flash memory (kByte) 512 RAM (kByte) 101 ADC type 5 12-bit SAR Total processing (MIPS) 300, 320 Features AES encryption, Configurable logic block, FPU32, InstaSPIN-FOC technology, Robotics UART 3 CAN (#) 1 PWM (Ch) 24 Security Secure storage TI functional safety category Functional Safety-Compliant Number of ADC channels 12, 18, 26, 28, 35 Direct memory access (Ch) 6 SPI 2 QEP 3 Hardware accelerators Control law accelerator, Trigonometric math accelerator Edge AI enabled Edge AI Studio enabled Operating temperature range (°C) to Rating Catalog Communication interface CAN, FSI, I2C, LIN, PMBUS, SPI, UART Operating system FreeRTOS Nonvolatile memory (kByte) 512 Number of I2Cs 2
CPU 1 C28, 1 CLA Frequency (MHz) 160 Flash memory (kByte) 512 RAM (kByte) 101 ADC type 5 12-bit SAR Total processing (MIPS) 300, 320 Features AES encryption, Configurable logic block, FPU32, InstaSPIN-FOC technology, Robotics UART 3 CAN (#) 1 PWM (Ch) 24 Security Secure storage TI functional safety category Functional Safety-Compliant Number of ADC channels 12, 18, 26, 28, 35 Direct memory access (Ch) 6 SPI 2 QEP 3 Hardware accelerators Control law accelerator, Trigonometric math accelerator Edge AI enabled Edge AI Studio enabled Operating temperature range (°C) to Rating Catalog Communication interface CAN, FSI, I2C, LIN, PMBUS, SPI, UART Operating system FreeRTOS Nonvolatile memory (kByte) 512 Number of I2Cs 2
LQFP (PZ) 100 256 mm² (16 mm × 16 mm) VQFN (RSH) 56 49 mm² (7 mm × 7 mm) LQFP (PM) 64 144 mm² (12 mm × 12 mm) LQFP (PN) 80 196 mm² (14 mm × 14 mm)
  • Real-time processing:
    • 160MHz C28x 32-bit DSP CPU
    • Equivalent to 320MHz Arm® Cortex®-M7 based device on real-time signal chain performance (see the Real-time Benchmarks Showcasing C2000™ Control MCU’s Optimized Signal Chain Application Note
    • IEEE 754 single-precision Floating-Point Unit (FPU32)
    • Trigonometric Math Unit (TMU)
      • Support for Nonlinear Proportional Integral Derivative (NLPID) control
    • CRC Engine and Instructions (VCRC)
  • Programmable Control Law Accelerator (CLA)
  • On-chip memory
    • 576KB of flash (ECC-protected) across five independent banks
      • Two 256KB banks
      • One 64KB bank, ideal of LFU/Bootloaders/data
    • 2KB of OTP (One Time Programmable flash memory)
    • 101KB of RAM (ECC/Parity protected)
  • Security
    • Secure Boot
    • JTAG Lock
    • Advanced Encryption Standard (AES) accelerator
    • Unique Identification (UID) number
  • Clock and system control
    • Two internal 10MHz oscillators
    • Crystal oscillator or external clock input
    • Windowed watchdog timer module
    • Missing clock detection circuitry
    • Dual-clock Comparator (DCC)
  • 3.3V I/O design
    • Internal VREG generation allows for single-supply design
    • Brownout reset (BOR) circuit
    • 5V failsafe and tolerant capability on 4 GPIOs for PMBUS/I2C support
    • Configurable 1.35V VIH on 4 GPIOs
  • System peripherals
    • 6-channel Direct Memory Access (DMA) controller
    • 66 individually programmable multiplexed General-Purpose Input/Output (GPIO) pins (19 shared with Analog)
    • 16 digital inputs on analog pins
    • Enhanced Peripheral Interrupt Expansion (ePIE)
    • Multiple low-power mode (LPM) support
  • Communications peripherals
    • One Power-Management Bus (PMBus) interface
      • Fast Plus Mode Support - 1MHz SCL
      • 5V/3.3V/1.35V VIH support on select pins
    • Two Inter-integrated Circuit (I2C) interfaces
    • One Controller Area Network with Flexible Data-Rate (CAN FD/MCAN) bus port
      • 4KB message RAM per MCAN module, independent of system memory
      • Ability to re-use RAM for CPU data variables if MCAN is not used
    • Two Serial Peripheral Interface (SPI) ports
    • Three UART-compatible Serial Communication Interface (SCI)
    • One UART-compatible Local Interconnect Network (LIN) interface
    • Fast Serial Interface (FSI) with one transmitter and one receiver (up to 200Mbps)
  • Analog system
    • Five 3.9MSPS, 12-bit Analog-to-Digital Converters (ADCs)
      • Up to 35 external channels (includes one gpdac output)
      • Four integrated Post-Processing Blocks (PPB) per ADC
    • Four windowed comparators (CMPSS) with 12-bit reference Digital-to-Analog Converters (DACs)
      • Digital glitch filters
      • Low DAC output to pin capability on CMPSS1
    • Two 12-bit buffered DAC output
    • Three Programmable Gain Amplifiers (PGAs)
      • Unity gain support
      • Inverting and non-inverting gain mode support
      • Programmable output filtering
  • Enhanced control peripherals
    • 24 ePWM channels with 12 channels that have high-resolution capability (100ps resolution)
      • Integrated dead-band support
      • Integrated hardware trip zones (TZs)
    • Two Enhanced Capture (eCAP) modules
    • Three Enhanced Quadrature Encoder Pulse (eQEP) modules with support for CW/CCW operation modes
    • 8 Sigma-Delta Filter Module (SDFM) input channels, 2 independent filters per channel
    • Embedded Pattern Generator (EPG)
  • Configurable Logic Block (CLB)
    • 4 tiles
    • Augments existing peripheral capability
    • Supports position manager solutions
  • Live Firmware Update (LFU)
  • Diagnostic features
    • Memory Power-On Self-Test (MPOST)
  • Functional Safety-Compliant targeted
    • Developed for functional safety applications
    • Documentation available to aid ISO 26262 and IEC 61508 system design
    • Systematic capability up to ASIL D and SIL 3 targeted
    • Hardware integrity up to ASIL B targeted
  • Safety-related certification
    • ISO 26262 certification up to ASIL B by TÜV SÜD planned
  • Package options:
    • 100-pin Low-profile Quad Flatpack (LQFP)[PZ suffix]
    • 80-pin LQFP [PN suffix]
    • 80-pin LQFP [PNA suffix]
    • 64-pin LQFP [PM suffix]
    • 56-pin Very Thin Quad Flatpack No-Lead (VQFN) [RSH suffix]
    • 49-ball Wafer Chip Scale Package(WCSP) [YAF suffix]
    • 32-pin Very Thin Quad Flatpack No-Lead (VQFN) [ZNG suffix]
  • Temperature options:
    • Junction (TJ): –40°C to 150°C
  • Real-time processing:
    • 160MHz C28x 32-bit DSP CPU
    • Equivalent to 320MHz Arm® Cortex®-M7 based device on real-time signal chain performance (see the Real-time Benchmarks Showcasing C2000™ Control MCU’s Optimized Signal Chain Application Note
    • IEEE 754 single-precision Floating-Point Unit (FPU32)
    • Trigonometric Math Unit (TMU)
      • Support for Nonlinear Proportional Integral Derivative (NLPID) control
    • CRC Engine and Instructions (VCRC)
  • Programmable Control Law Accelerator (CLA)
  • On-chip memory
    • 576KB of flash (ECC-protected) across five independent banks
      • Two 256KB banks
      • One 64KB bank, ideal of LFU/Bootloaders/data
    • 2KB of OTP (One Time Programmable flash memory)
    • 101KB of RAM (ECC/Parity protected)
  • Security
    • Secure Boot
    • JTAG Lock
    • Advanced Encryption Standard (AES) accelerator
    • Unique Identification (UID) number
  • Clock and system control
    • Two internal 10MHz oscillators
    • Crystal oscillator or external clock input
    • Windowed watchdog timer module
    • Missing clock detection circuitry
    • Dual-clock Comparator (DCC)
  • 3.3V I/O design
    • Internal VREG generation allows for single-supply design
    • Brownout reset (BOR) circuit
    • 5V failsafe and tolerant capability on 4 GPIOs for PMBUS/I2C support
    • Configurable 1.35V VIH on 4 GPIOs
  • System peripherals
    • 6-channel Direct Memory Access (DMA) controller
    • 66 individually programmable multiplexed General-Purpose Input/Output (GPIO) pins (19 shared with Analog)
    • 16 digital inputs on analog pins
    • Enhanced Peripheral Interrupt Expansion (ePIE)
    • Multiple low-power mode (LPM) support
  • Communications peripherals
    • One Power-Management Bus (PMBus) interface
      • Fast Plus Mode Support - 1MHz SCL
      • 5V/3.3V/1.35V VIH support on select pins
    • Two Inter-integrated Circuit (I2C) interfaces
    • One Controller Area Network with Flexible Data-Rate (CAN FD/MCAN) bus port
      • 4KB message RAM per MCAN module, independent of system memory
      • Ability to re-use RAM for CPU data variables if MCAN is not used
    • Two Serial Peripheral Interface (SPI) ports
    • Three UART-compatible Serial Communication Interface (SCI)
    • One UART-compatible Local Interconnect Network (LIN) interface
    • Fast Serial Interface (FSI) with one transmitter and one receiver (up to 200Mbps)
  • Analog system
    • Five 3.9MSPS, 12-bit Analog-to-Digital Converters (ADCs)
      • Up to 35 external channels (includes one gpdac output)
      • Four integrated Post-Processing Blocks (PPB) per ADC
    • Four windowed comparators (CMPSS) with 12-bit reference Digital-to-Analog Converters (DACs)
      • Digital glitch filters
      • Low DAC output to pin capability on CMPSS1
    • Two 12-bit buffered DAC output
    • Three Programmable Gain Amplifiers (PGAs)
      • Unity gain support
      • Inverting and non-inverting gain mode support
      • Programmable output filtering
  • Enhanced control peripherals
    • 24 ePWM channels with 12 channels that have high-resolution capability (100ps resolution)
      • Integrated dead-band support
      • Integrated hardware trip zones (TZs)
    • Two Enhanced Capture (eCAP) modules
    • Three Enhanced Quadrature Encoder Pulse (eQEP) modules with support for CW/CCW operation modes
    • 8 Sigma-Delta Filter Module (SDFM) input channels, 2 independent filters per channel
    • Embedded Pattern Generator (EPG)
  • Configurable Logic Block (CLB)
    • 4 tiles
    • Augments existing peripheral capability
    • Supports position manager solutions
  • Live Firmware Update (LFU)
  • Diagnostic features
    • Memory Power-On Self-Test (MPOST)
  • Functional Safety-Compliant targeted
    • Developed for functional safety applications
    • Documentation available to aid ISO 26262 and IEC 61508 system design
    • Systematic capability up to ASIL D and SIL 3 targeted
    • Hardware integrity up to ASIL B targeted
  • Safety-related certification
    • ISO 26262 certification up to ASIL B by TÜV SÜD planned
  • Package options:
    • 100-pin Low-profile Quad Flatpack (LQFP)[PZ suffix]
    • 80-pin LQFP [PN suffix]
    • 80-pin LQFP [PNA suffix]
    • 64-pin LQFP [PM suffix]
    • 56-pin Very Thin Quad Flatpack No-Lead (VQFN) [RSH suffix]
    • 49-ball Wafer Chip Scale Package(WCSP) [YAF suffix]
    • 32-pin Very Thin Quad Flatpack No-Lead (VQFN) [ZNG suffix]
  • Temperature options:
    • Junction (TJ): –40°C to 150°C

The TMS320F28P55x (F28P55x) is a member of the C2000™ real-time microcontroller family of scalable, ultra-low latency devices designed for efficiency in power electronics, including but not limited to: high power density, high switching frequencies, and supporting the use of GaN and SiC technologies.

These include such applications as:

The real-time control subsystem is based on TI’s 32-bit C28x DSP core, which provides 160MHz of signal-processing performance for floating- or fixed-point code running from either on-chip flash or SRAM. The C28x CPU is further boosted by the Floating-Point Unit (FPU), Trigonometric Math Unit (TMU), and VCRC (Cyclical Redundancy Check) extended instruction sets, speeding up common algorithms key to real-time control systems.

The CLA allows significant offloading of common tasks from the main C28x CPU. The CLA is an independent 32-bit floating-point math accelerator that executes in parallel with the CPU. Additionally, the CLA has its own dedicated memory resources and it can directly access the key peripherals that are required in a typical control system. Support of a subset of ANSI C is standard, as are key features like hardware breakpoints and hardware task-switching.

The F28P55x supports up to 576KB of flash memory divided into two 256KB banks plus one 64KB bank, which enable programming one bank and execution in another bank in parallel. Up to 101KB of on-chip SRAM is also available to supplement the flash memory.

The Live Firmware Update hardware enhancements on F28P55x allow fast context switching from the old firmware to the new firmware to minimize application downtime when updating the device firmware.

High-performance analog blocks are integrated on the F28P55x real-time microcontroller (MCU) and are closely coupled with the processing and PWM units to provide optimal real-time signal chain performance. Twenty-four PWM channels, all supporting frequency-independent resolution modes, enable control of various power stages from a 3-phase inverter to power factor correction and advanced multilevel power topologies.

The inclusion of the Configurable Logic Block (CLB) allows the user to add custom logic and potentially integrate FPGA-like functions into the C2000 real-time MCU.

Interfacing is supported through various industry-standard communication ports (such as SPI, SCI, I2C, PMBus, LIN, and CAN FD) and offers multiple pin-muxing options for optimal signal placement.

Want to learn more about features that make C2000 Real-Time MCUs the right choice for your real-time control system? Check out The Essential Guide for Developing With C2000™ Real-Time Microcontrollers and visit the C2000™ real-time control MCUs page.

The Getting Started With C2000™ Real-Time Control Microcontrollers (MCUs) Getting Started Guide covers all aspects of development with C2000 devices from hardware to support resources. In addition to key reference documents, each section provides relevant links and resources to further expand on the information covered.

Ready to get started? Check out the TMDSCNCD28P551X evaluation board and download C2000Ware.

The TMS320F28P55x (F28P55x) is a member of the C2000™ real-time microcontroller family of scalable, ultra-low latency devices designed for efficiency in power electronics, including but not limited to: high power density, high switching frequencies, and supporting the use of GaN and SiC technologies.

These include such applications as:

The real-time control subsystem is based on TI’s 32-bit C28x DSP core, which provides 160MHz of signal-processing performance for floating- or fixed-point code running from either on-chip flash or SRAM. The C28x CPU is further boosted by the Floating-Point Unit (FPU), Trigonometric Math Unit (TMU), and VCRC (Cyclical Redundancy Check) extended instruction sets, speeding up common algorithms key to real-time control systems.

The CLA allows significant offloading of common tasks from the main C28x CPU. The CLA is an independent 32-bit floating-point math accelerator that executes in parallel with the CPU. Additionally, the CLA has its own dedicated memory resources and it can directly access the key peripherals that are required in a typical control system. Support of a subset of ANSI C is standard, as are key features like hardware breakpoints and hardware task-switching.

The F28P55x supports up to 576KB of flash memory divided into two 256KB banks plus one 64KB bank, which enable programming one bank and execution in another bank in parallel. Up to 101KB of on-chip SRAM is also available to supplement the flash memory.

The Live Firmware Update hardware enhancements on F28P55x allow fast context switching from the old firmware to the new firmware to minimize application downtime when updating the device firmware.

High-performance analog blocks are integrated on the F28P55x real-time microcontroller (MCU) and are closely coupled with the processing and PWM units to provide optimal real-time signal chain performance. Twenty-four PWM channels, all supporting frequency-independent resolution modes, enable control of various power stages from a 3-phase inverter to power factor correction and advanced multilevel power topologies.

The inclusion of the Configurable Logic Block (CLB) allows the user to add custom logic and potentially integrate FPGA-like functions into the C2000 real-time MCU.

Interfacing is supported through various industry-standard communication ports (such as SPI, SCI, I2C, PMBus, LIN, and CAN FD) and offers multiple pin-muxing options for optimal signal placement.

Want to learn more about features that make C2000 Real-Time MCUs the right choice for your real-time control system? Check out The Essential Guide for Developing With C2000™ Real-Time Microcontrollers and visit the C2000™ real-time control MCUs page.

The Getting Started With C2000™ Real-Time Control Microcontrollers (MCUs) Getting Started Guide covers all aspects of development with C2000 devices from hardware to support resources. In addition to key reference documents, each section provides relevant links and resources to further expand on the information covered.

Ready to get started? Check out the TMDSCNCD28P551X evaluation board and download C2000Ware.

下載 觀看有字幕稿的影片 影片

技術文件

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

TMDSCNCD28P55X — TMDSCNCD28P55X controlCARD 評估模組

TMDSCNCD28P55X 是一款用於 TI C2000™ MCU 系列 F28P55x 裝置的低成本評估和開發板。其隨附 HSEC180 (180 針腳高速邊緣連接器),並且為 controlCARD,因此是初始評估和原型設計的理想之選。若要評估 TMDSCNCD28P55X,需要 180 針腳的擴充站 TMDSHSECDOCK,並且可單獨或以搭售套件的方式購買。

使用指南: PDF | HTML
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有庫存
限制:
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無法提供
軟體開發套件 (SDK)

C2000WARE — C2000Ware for C2000 Microcontrollers

C2000Ware 是一套完整的軟體和文件,可將開發時間縮至最短。其中包括裝置專用驅動程式,程式庫和週邊設備範例。

  • C2000 controlCARD、實驗套件及 LaunchPad 的硬體設計電路圖、BOM、Gerber 檔案和文件。
  • 裝置專用支援檔案、位元欄位標頭、位元欄位裝置週邊設備範例 (包括 LaunchPad™ 示範) 及裝置開發使用指南。
  • 裝置專用驅動程式庫和以驅動程式為基礎的週邊設備範例。
  • FreeRTOS 核心、C28x 與 Cortex-M4(CM) 連接埠與示範範範例。
  • 裝置專用與核心程式庫,例如:
    • (...)
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軟體開發套件 (SDK)

C2000WARE-DIGITALPOWER-SDK — DigitalPower SDK for C2000 Real-time Controllers

    • C2000™ 微控制器 (MCU) 的 DigitalPower SDK 是一套完整的軟體基礎設施、工具和文件,旨在減少針對各種 AC-DC、DC-DC 和 DC-AC 電源應用的 C2000 MCU 基準數位電源系統開發時間。該軟體包含在 C2000 數位電源評估模組 (EVM) 和 TI 設計 (TID) 上執行的韌體,這些模組專為太陽能、電信、伺服器、電動汽車充電器和工業電力傳輸應用而設計。DigitalPower SDK 在數位電源應用的開發和評估的每一個階段提供所有所需的資源
    • SDK 中提供了 C2000Ware (...)
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軟體開發套件 (SDK)

C2000WARE-MOTORCONTROL-SDK — MotorControl software development kit (SDK) for C2000™ MCUs

C2000™ 微控制器 (MCU) 的 MotorControl SDK 是一套完整的軟體基礎設施、工具和文件,旨在減少針對各種三相馬達控制應用的 C2000 即時控制器基馬達控制系統開發時間。該軟體包含在 C2000 馬達控制評估模組 (EVM) 和 TI 設計 (TID) 上運作的韌體,這些模組專為工業驅動、機器人、家電和汽車應用而設計。MotorControl SDK 在高性能馬達控制應用程式的每一個開發和評估階段提供所有所需的資源。

SDK 中提供了 C2000Ware 的副本,因此它提供了裝置特定的驅動程式和支援軟體,以完成複雜系統應用中的範例

請注意,以下列出的是此 SDK 支援的 (...)

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IDE、配置、編譯器或偵錯程式

C2000_CLA_SAFETI_CQKIT_RV — C2000™ and CLA safety compiler qualification kit (leverages compiler release validations)

開發安全編譯器資格認證套件是為了協助客戶對 TI ARM、C6000、C7000 或 C2000/CLA C/C++ 編譯器的使用進行認證,以確保符合功能安全標準,如 IEC 61508 和 ISO 26262。

安全編譯器資格認證套件:

  • 對 TI 客戶免費
  • 不需要使用者進行資格測試
  • 支援編譯器覆蓋範圍分析*
    • * 覆蓋範圍資料收集的說明可從每個 QKIT 下載頁面下載。
  • 不包括 Validas 諮詢

如需存取安全編譯器資格認證套件,請按一下上面其中一個索取按鈕。

如需進一步了解功能安全產品,請造訪 (...)

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IDE、配置、編譯器或偵錯程式

CCSTUDIO — Code Composer Studio™ integrated development environment (IDE)

CCStudio™ IDE is part of TI's extensive CCStudio™ development ecosystem and is an integrated development environment for TI's microcontrollers, processors, wireless connectivity devices, and radar sensors. CCStudio IDE is available as desktop or cloud-based applications. The cloud version (...)

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IDE、配置、編譯器或偵錯程式

EDGE-AI-STUDIO-MCU — Edge AI Studio for Microcontrollers

Edge AI Studio 是一系列圖形和命令行工具,旨在加速 TI 處理器、微控制器和雷達感測器上的邊緣 AI 開發。不管是使用來自 TI Model Zoo 的模型,還是
運用您自己的模型來開發概念驗證,Edge AI Studio 都能提供您所需的工具。

Edge AI Studio 圖形使用者介面提供完全整合的解決方案,用於收集和註釋資料、訓練和編譯模型,以在即時開發平台上部署。從 TI Model Zoo 中的各種預先訓練的模型中選擇,並可選擇透過自訂資料重新訓練,以提升準確度和性能。Edge AI Studio (...)

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IDE、配置、編譯器或偵錯程式

SYSCONFIG — Standalone desktop version of SysConfig

CCStudio™ SysConfig is part of TI's extensive CCStudio™ development ecosystem and is a configuration tool that simplifies hardware and software configuration challenges to accelerate software development.

SysConfig provides an intuitive graphical user interface for configuring pins, peripherals, (...)

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快速入門

TI-DEVELOPER-ZONE — Start embedded development on your desktop or in the cloud

From evaluation to deployment the TI Developer Zone provides a comprehensive range of software, tools and training to ensure that you have everything you need for each stage of the development process.
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軟體程式設計工具

UNIFLASH — UniFlash for most TI microcontrollers (MCUs) and mmWave sensors

UniFlash 是 TI 龐大 CCStudio™ 開發生態系統的一部分,是一款用於在 TI 微控制器與無線連線裝置上對晶片內快閃記憶體進行燒錄,以及在 TI 處理器上對板載快閃記憶體進行燒錄的軟體工具。UniFlash 提供圖形化介面與命令行介面,並可在桌面上或雲端中執行。

UniFlash 可從 CCStudio 開發人員區上的雲端執行,或在下載後於 Windows®、Linux® 和 macOS® 電腦中使用。

請注意,mmWave、AMx、K2G 和 J7 裝置不支援 macOS。AMx、K2G 和 J7 裝置僅於命令列上支援。

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模擬型號

TMS320F28P551xx, TMS320F28P552xx and TMS320F28P558xx BSDL Model

SPRM897.ZIP (19 KB) - BSDL 模型
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模擬型號

TMS320F28P551xx, TMS320F28P552xx and TMS320F28P558xx IBIS Model

SPRM890.ZIP (3748 KB) - IBIS 模型
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參考設計

TIDA-011008 — 3.6kW GaN 型單相串列式逆變器參考設計

此參考設計提供 GaN 型單相串列式逆變器實作概覽,設計中包含單串列輸入,可處理多達 10 塊串聯太陽光電 (PV) 面板。在 230V 單相併網條件下,來自串列輸入的額定功率最高可達 3.6kW。在單一 C2000™ MCU 上執行三個功率級的數位控制。此電路板還配備 WiFi® 通訊埠,可輕鬆進行遠端監測和控制存取。

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封裝 針腳 CAD 符號、佔位空間與 3D 模型
LQFP (PZ) 100 Ultra Librarian
VQFN (RSH) 56 Ultra Librarian
LQFP (PM) 64 Ultra Librarian
LQFP (PN) 80 Ultra Librarian

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建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

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