TMDS171
- HDMI Input Port to Output Port with CDR Supporting up to 3.4 Gbps Data Rates
- Compatible with HDMI1.4b Electrical Parameters.
- Support for 4k2k30p and up to WUXGA 12-bit Color Depth or 1080p with Higher Refresh Rates
- Retimes Input Stream to Compensate for Random Jitter
- Adaptive Receiver Equalizer or Programmable Fixed Equalizer
- I2C and Pin Strap Programmable
- Inter-Pair Skew Compensation of 5+ Bits
- Link Debug Tools Including Eye Diagram After RX Equalizer
- Single Ended Mode ARC Support
- 48-pin 7mm x 7mm 0.5 mm Pitch VQFN Package
- Extended Commercial Temperature Support 0°C – 85°C (TMDS171)
- Industrial Temperature Support -40°C – 85°C (TMDS171I)
The TMDS171 is a digital video interface (DVI) or high-definition multimedia interface (HDMI) retimer. The TMDS171 supports four TMDS channels, Audio Return Channel (SPDIF_IN/ARC_OUT), Hot Plug Detect (HPD) and Digital Display Control (DDC) interfaces. The TMDS171 supports signaling rates up to 3.4 Gbps to allow for the highest resolutions of 4k2k30p 24 bits per pixel and up to WUXGA 12-bit color depth or 1080p with higher refresh rates. The TMDS171 automatically configures itself as a re-driver at low data rate (< 1 Gbps) or as a re-timer above this data rate.
The TMDS171 supports dual power supply rails of 1.2 V on VDD and 3.3 V on VCC for active power reduction. Several methods of power management are implemented to reduce overall power consumption. TMDS171 supports fixed EQ gain or adaptive EQ control by I2C or pin strap to compensate for different lengths input cable or board traces.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | TMDS171/I 3.4 Gbps TMDS RETIMER datasheet (Rev. E) | PDF | HTML | 2017/9/12 | ||
| 應用說明 | High-Speed Layout Guidelines for Signal Conditioners and USB Hubs (Rev. A) | PDF | HTML | 2026/1/8 | |||
| 應用說明 | TMDS181 and TMDS171 Configuration Guide | 2019/12/13 | ||||
| 應用說明 | TMDS171 Schematic Checklist | 2019/8/28 | ||||
| 使用指南 | Pattern Verifier and Generator User's Guide | 2018/4/27 | ||||
| 技術文章 | How to select a redriver or retimer for HDMI 2.0 jitter cleansing | PDF | HTML | 2017/5/1 | |||
| 技術文章 | How to select the right retimer for HDMI 2.0 applications | PDF | HTML | 2016/9/27 | |||
| 技術文章 | How to reduce jitter and improve signal integrity in source and sink system design | PDF | HTML | 2016/7/11 | |||
| 技術文章 | HDMI 2.0: How to generate cleaner signals over long traces, connectors and cables | PDF | HTML | 2016/6/21 | |||
| 白皮書 | Build a true fidelity system using video signal conditioners | 2016/6/9 |
設計與開發
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TMDS171RGZEVM — 採用 RGZ 封裝的 TMDS171 3.4-Gbps TMDS 重定時器評估模組
TMDS171 EVM 是一塊 PCB，用於協助客戶評估 TMDS171 裝置於 HDMI 介面的視訊應用中的表現。 此 EVM 還可以用作 RGZ 封裝中 TMDS171 的實作硬體參考設計。 PCB 設計/佈局檔案可依需求提供，提供 TMDS171 或 DP159 RGZ 零組件佈線或配置規則的 PCB 設計圖。
SLLC455 — EyeScan Tool
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFN (RGZ) | 48 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。