TLV4825

現行

四路、5.5V、3MHz 零漂移 CMOS 精密運算放大器

產品詳細資料

Number of channels 4 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 1.8 Vos (offset voltage at 25°C) (max) (mV) 0.004 Offset drift (typ) (µV/°C) 0.02 GBW (typ) (MHz) 3.5 Features Cost Optimized, Zero Drift Slew rate (typ) (V/µs) 1.8 Rail-to-rail In-Out Iq per channel (typ) (mA) 0.5 CMRR (typ) (dB) 120 Rating Catalog Operating temperature range (°C) -40 to 125 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) -0.1 Input common mode headroom (to positive supply) (typ) (V) 0.1 Output swing headroom (to negative supply) (typ) (V) 0.007 Output swing headroom (to positive supply) (typ) (V) -0.007
Number of channels 4 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 1.8 Vos (offset voltage at 25°C) (max) (mV) 0.004 Offset drift (typ) (µV/°C) 0.02 GBW (typ) (MHz) 3.5 Features Cost Optimized, Zero Drift Slew rate (typ) (V/µs) 1.8 Rail-to-rail In-Out Iq per channel (typ) (mA) 0.5 CMRR (typ) (dB) 120 Rating Catalog Operating temperature range (°C) -40 to 125 Architecture CMOS Input common mode headroom (to negative supply) (typ) (V) -0.1 Input common mode headroom (to positive supply) (typ) (V) 0.1 Output swing headroom (to negative supply) (typ) (V) 0.007 Output swing headroom (to positive supply) (typ) (V) -0.007
TSSOP (PW) 14 32 mm² (5 mm × 6.4 mm) SOIC (D) 14 51.9 mm² (8.65 mm × 6 mm)
  • Ultra-low offset drift: ±0.02µV/°C
  • Flat low frequency noise: 0.3µVPP (0.1 to 10Hz)
  • Ultra-low offset: ±4µV
  • Rail-to-rail input and output
  • Very high AOL, CMRR, PSRR: > 120dB
  • Wide input common-mode: 100mV beyond rails
  • Low input bias current: ±100pA
  • Low thermal noise floor: 15nV/√Hz
  • Wide gain bandwidth: 3.5MHz
  • High CL drive: 1nF (no sustained oscillations)
  • Low quiescent current: 500µA/channel
  • Wide supply range: 1.8V to 5.5V
  • Wide temperature range: –40°C to +125°C
  • Ultra-low offset drift: ±0.02µV/°C
  • Flat low frequency noise: 0.3µVPP (0.1 to 10Hz)
  • Ultra-low offset: ±4µV
  • Rail-to-rail input and output
  • Very high AOL, CMRR, PSRR: > 120dB
  • Wide input common-mode: 100mV beyond rails
  • Low input bias current: ±100pA
  • Low thermal noise floor: 15nV/√Hz
  • Wide gain bandwidth: 3.5MHz
  • High CL drive: 1nF (no sustained oscillations)
  • Low quiescent current: 500µA/channel
  • Wide supply range: 1.8V to 5.5V
  • Wide temperature range: –40°C to +125°C

The TLVx825 family of single, dual, and quad channel operational amplifiers enable precision performance such as lower offset, lower offset drift over temperature, greater offset stability over time and a flat noise floor. This level of performance is crucial to a variety of systems focusing on precision voltage sensing from sensors and precision current sensing using smaller shunt resistors.

TLVx825 uses zero-drift architecture to achieve an input referred offset voltage of 4µV, an offset drift of 0.02µV/°C and a low frequency noise of 320nVPP in the standard 0.1 – 10Hz range. This combination of specs provides excellent accuracy in high gain applications, thereby greatly reducing the need for system level calibration.

Additionally, with a quiescent current of 500µA, the TLVx825 is able to achieve a bandwidth of 3.5MHz and a broadband noise of 15nV/√Hz. This ability is crucial to achieve higher linearity, and signal-to-noise ratio in applications involving higher resolution, mid-speed analog to digital converters (ADCs) while minimizing system power.

TLVx825 is operational from 1.8V to 5.5V, and is available in standard packages for broader industrial applications as well as the micro-size packages to fit in the space-constrained portable applications. The devices are specified for operation from –40°C to +125°C.

The TLVx825 family of single, dual, and quad channel operational amplifiers enable precision performance such as lower offset, lower offset drift over temperature, greater offset stability over time and a flat noise floor. This level of performance is crucial to a variety of systems focusing on precision voltage sensing from sensors and precision current sensing using smaller shunt resistors.

TLVx825 uses zero-drift architecture to achieve an input referred offset voltage of 4µV, an offset drift of 0.02µV/°C and a low frequency noise of 320nVPP in the standard 0.1 – 10Hz range. This combination of specs provides excellent accuracy in high gain applications, thereby greatly reducing the need for system level calibration.

Additionally, with a quiescent current of 500µA, the TLVx825 is able to achieve a bandwidth of 3.5MHz and a broadband noise of 15nV/√Hz. This ability is crucial to achieve higher linearity, and signal-to-noise ratio in applications involving higher resolution, mid-speed analog to digital converters (ADCs) while minimizing system power.

TLVx825 is operational from 1.8V to 5.5V, and is available in standard packages for broader industrial applications as well as the micro-size packages to fit in the space-constrained portable applications. The devices are specified for operation from –40°C to +125°C.

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 TLVx825 3.5MHz, 1.8V to 5.5V, High Precision, Zero-Drift Operational Amplifiers datasheet (Rev. A) PDF | HTML 2026/6/24
技術文章 為各種設計實現精準放大器性能 PDF | HTML PDF | HTML 2026/6/30

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

AMP-PDK-EVM — 放大器性能開發套件評估模組

放大器性能開發套件 (PDK) 是一款評估模組 (EVM) 套件,可測試通用運算放大器 (op amp) 參數,並與大多數運算放大器和比較器相容。EVM 套件提供主板和多個插槽式子卡選項,可滿足封裝需求,使工程師能夠快速評估和驗證裝置性能。

AMP-PDK-EVM 套件支援五種最熱門的業界標準封裝,包括:

  • D (SOIC-8 和 SOIC-14)
  • PW (TSSOP-14)
  • DGK (VSSOP-8)
  • DBV (SOT23-5 和 SOT23-6)
  • DCK (SC70-5 和 SC70-6)
使用指南: PDF | HTML
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模擬型號

TLV825, TLV2825 and TLV4825 TINA-TI SPICE Model (Rev. A)

SLVMF11A.ZIP (33 KB) - TINA-TI Spice 模型
支援產品和硬體
封裝 針腳 CAD 符號、佔位空間與 3D 模型
TSSOP (PW) 14 Ultra Librarian
SOIC (D) 14 Ultra Librarian

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