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TAC5112-Q1 現行 具 105dB 動態範圍 ADC、114dB 動態範圍 DAC 的車用立體聲道音訊轉碼器 Higher CMRR and temperature grade with smaller package or wettable-flank package options

產品詳細資料

Number of ADC channels 2 Number of DAC channels 2 Digital audio interface DSP, I2S, L, R, TDM Control interface I2C Analog inputs 6 Analog outputs 6 Features Matrix mixing, Notch filter, Phase-locked loop (PLL), Stereo headphone amplifier Sampling rate (max) (kHz) 96 Rating Automotive ADC SNR (typ) (dB) 92 DAC SNR (typ) (dB) 102 Operating temperature range (°C) -40 to 105
Number of ADC channels 2 Number of DAC channels 2 Digital audio interface DSP, I2S, L, R, TDM Control interface I2C Analog inputs 6 Analog outputs 6 Features Matrix mixing, Notch filter, Phase-locked loop (PLL), Stereo headphone amplifier Sampling rate (max) (kHz) 96 Rating Automotive ADC SNR (typ) (dB) 92 DAC SNR (typ) (dB) 102 Operating temperature range (°C) -40 to 105
VQFN (RHB) 32 25 mm² (5 mm × 5 mm)
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 2: –40°C to 105°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C6
  • Stereo Audio DAC:
    • 102-dBA Signal-to-Noise Ratio
    • 16-, 20-, 24-, or 32-Bit Data
    • Supports Sample Rates From 8kHz to 96kHz
    • 3D, Bass, Treble, EQ, De-Emphasis Effects
    • Flexible Power Saving Modes and Performance are Available
  • Stereo Audio ADC:
    • 92-dBA Signal-to-Noise Ratio
    • Supports Sample Rates From 8kHz to 96kHz
    • Digital Signal Processing and Noise Filteringavailable during record
  • Six Audio Input Pins:
    • One Stereo Pair of Single-Ended Inputs
    • One Stereo Pair of Fully Differential Inputs
  • Six Audio Output Drivers:
    • Fully Differential or Single-Ended Stereo Headphone Drivers
    • Fully Differential Stereo Line Outputs
  • Low Power: 14-mW Stereo, 48kHz Playback With 3.3V Analog Supply
  • Ultralow-Power Mode With Passive Analog Bypass
  • Programmable Input/Output Analog Gains
  • Automatic Gain Control (AGC) for Record
  • Programmable Microphone Bias Level
  • Programmable PLL for Flexible Clock Generation
  • I2C Control Bus
  • Audio Serial Data Bus Supports I2S, Left/RightJustified, DSP, and TDM Modes
  • Extensive Modular Power Control
  • Power Supplies:
    • Analog: 2.7V to 3.6V
    • Digital Core: 1.525V to 1.95V
    • Digital I/O: 1.1V to 3.6V
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 2: –40°C to 105°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C6
  • Stereo Audio DAC:
    • 102-dBA Signal-to-Noise Ratio
    • 16-, 20-, 24-, or 32-Bit Data
    • Supports Sample Rates From 8kHz to 96kHz
    • 3D, Bass, Treble, EQ, De-Emphasis Effects
    • Flexible Power Saving Modes and Performance are Available
  • Stereo Audio ADC:
    • 92-dBA Signal-to-Noise Ratio
    • Supports Sample Rates From 8kHz to 96kHz
    • Digital Signal Processing and Noise Filteringavailable during record
  • Six Audio Input Pins:
    • One Stereo Pair of Single-Ended Inputs
    • One Stereo Pair of Fully Differential Inputs
  • Six Audio Output Drivers:
    • Fully Differential or Single-Ended Stereo Headphone Drivers
    • Fully Differential Stereo Line Outputs
  • Low Power: 14-mW Stereo, 48kHz Playback With 3.3V Analog Supply
  • Ultralow-Power Mode With Passive Analog Bypass
  • Programmable Input/Output Analog Gains
  • Automatic Gain Control (AGC) for Record
  • Programmable Microphone Bias Level
  • Programmable PLL for Flexible Clock Generation
  • I2C Control Bus
  • Audio Serial Data Bus Supports I2S, Left/RightJustified, DSP, and TDM Modes
  • Extensive Modular Power Control
  • Power Supplies:
    • Analog: 2.7V to 3.6V
    • Digital Core: 1.525V to 1.95V
    • Digital I/O: 1.1V to 3.6V

The TLV320AIC3104-Q1 is a low-power stereo audio codec with stereo headphone amplifiers, as well as multiple inputs and outputs that are programmable in single-ended or fully differential configurations. Extensive register-based power control is included, enabling stereo 48kHz DAC playback as low as 14mW from a 3.3V analog supply, making the device an excellent choice for car audio applications in cluster and head unit systems.

The record path of the TLV320AIC3104-Q1 contains integrated microphone bias, digitally controlled stereo microphone preamplifier, and automatic gain control (AGC), with mix/mux capability among the multiple analog inputs. Programmable filters are available during record which can remove audible noise that can occur during noisy and unpredictable environments, such as when an e-call system is activated. The playback path includes mix/mux capability from the stereo DAC and selected inputs, through programmable volume controls, to the various outputs.

The TLV320AIC3104-Q1 contains four high-power output drivers as well as two fully differential output drivers. The high-power output drivers are capable of driving a variety of load configurations, including up to four channels of single-ended 16Ω headphones using AC-coupling capacitors, or stereo 16Ω headphones in a capless output configuration. These parameters enable the TLV320AIC3104-Q1 to act as an interface between the MCU and speaker amplifiers, such as the TPA3111D1-Q1, in various audio applications in the infotainment and cluster fields.

The stereo audio DAC supports sampling rates from 8kHz to 96kHz and includes programmable digital filtering in the DAC path for 3D, bass, treble, midrange effects, speaker equalization, and de-emphasis for 32kHz, 44.1kHz, and 48kHz sample rates. The stereo audio ADC supports sampling rates from 8kHz to 96kHz and is preceded by programmable gain amplifiers (PGA) or an automatic gain control (AGC) circuit that can provide up to 59.5dB analog gain for low-level microphone inputs. The TLV320AIC3104-Q1 provides an extremely high range of programmability for both attack (8ms to 1,408ms) and for decay (0.05s to 22.4s). This extended AGC range allows the AGC to be tuned for many types of applications.

Where neither analog nor digital signal processing are required, the device can be put in a special analog signal passthrough mode. This mode significantly reduces power consumption, as most of the device is powered down during this passthrough operation.

The serial control bus supports the I2C protocol, whereas the serial audio data bus is programmable for I2S, left/right-justified, DSP, or TDM modes. A highly programmable PLL is included for flexible clock generation and support for all standard audio rates from a wide range of available MCLKs, varying from 512kHz to 50MHz, with special attention paid to the most-popular cases of 12MHz, 13MHz, 16MHz, 19.2MHz, and 19.68MHz system clocks.

The TLV320AIC3104-Q1 operates from an analog supply of 2.7V to 3.6V, a digital core supply of 1.525V to 1.95V, and a digital I/O supply of 1.1V to 3.6V.

The TLV320AIC3104-Q1 is a low-power stereo audio codec with stereo headphone amplifiers, as well as multiple inputs and outputs that are programmable in single-ended or fully differential configurations. Extensive register-based power control is included, enabling stereo 48kHz DAC playback as low as 14mW from a 3.3V analog supply, making the device an excellent choice for car audio applications in cluster and head unit systems.

The record path of the TLV320AIC3104-Q1 contains integrated microphone bias, digitally controlled stereo microphone preamplifier, and automatic gain control (AGC), with mix/mux capability among the multiple analog inputs. Programmable filters are available during record which can remove audible noise that can occur during noisy and unpredictable environments, such as when an e-call system is activated. The playback path includes mix/mux capability from the stereo DAC and selected inputs, through programmable volume controls, to the various outputs.

The TLV320AIC3104-Q1 contains four high-power output drivers as well as two fully differential output drivers. The high-power output drivers are capable of driving a variety of load configurations, including up to four channels of single-ended 16Ω headphones using AC-coupling capacitors, or stereo 16Ω headphones in a capless output configuration. These parameters enable the TLV320AIC3104-Q1 to act as an interface between the MCU and speaker amplifiers, such as the TPA3111D1-Q1, in various audio applications in the infotainment and cluster fields.

The stereo audio DAC supports sampling rates from 8kHz to 96kHz and includes programmable digital filtering in the DAC path for 3D, bass, treble, midrange effects, speaker equalization, and de-emphasis for 32kHz, 44.1kHz, and 48kHz sample rates. The stereo audio ADC supports sampling rates from 8kHz to 96kHz and is preceded by programmable gain amplifiers (PGA) or an automatic gain control (AGC) circuit that can provide up to 59.5dB analog gain for low-level microphone inputs. The TLV320AIC3104-Q1 provides an extremely high range of programmability for both attack (8ms to 1,408ms) and for decay (0.05s to 22.4s). This extended AGC range allows the AGC to be tuned for many types of applications.

Where neither analog nor digital signal processing are required, the device can be put in a special analog signal passthrough mode. This mode significantly reduces power consumption, as most of the device is powered down during this passthrough operation.

The serial control bus supports the I2C protocol, whereas the serial audio data bus is programmable for I2S, left/right-justified, DSP, or TDM modes. A highly programmable PLL is included for flexible clock generation and support for all standard audio rates from a wide range of available MCLKs, varying from 512kHz to 50MHz, with special attention paid to the most-popular cases of 12MHz, 13MHz, 16MHz, 19.2MHz, and 19.68MHz system clocks.

The TLV320AIC3104-Q1 operates from an analog supply of 2.7V to 3.6V, a digital core supply of 1.525V to 1.95V, and a digital I/O supply of 1.1V to 3.6V.

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TLV320AIC3104 現行 具 6 個輸入、6 個輸出、HP 放大器和強化數位效果的低功耗立體聲道轉碼器 Catalog version

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

TLV320AIC3104EVM-K — TLV320AIC3104 評估模組和 USB 主機板

TLV320AIC3104EVM-K 由 EVM 和 PDK 兩個電路板組成,可搭配個人電腦使用。TLV320AIC3104EVM 是採用德州儀器模組化 EVM 外型尺寸製造的 EVM。此評估模組 (EVM) 是一款完整的立體聲音訊編解碼器,具備多種輸入和輸出、廣泛的音訊路由、混音及音效功能。EVM 可直接評估 TLV320AIC3104 裝置,亦即低功率立體聲音訊編解碼器。

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模擬型號

TLV320AIC3104 IBIS Model

SLIM118.ZIP (83 KB) - IBIS 模型
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計算工具

SLAR163 — Audio CODEC/ADC PLL Calculator

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參考設計

TIDA-00724 — 汽車緊急呼叫 (eCall) 音訊子系統參考設計。

汽車緊急呼叫 (eCall) 系統的效率與診斷需求,為音訊子系統帶來喇叭診斷及低功耗等特殊要求。  此參考設計展示車用雙通道音訊編解碼器 (TLV320AIC3104-Q1) 和 D 類音訊放大器 (TAS5411-Q1) 在 eCall 上的應用。

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封裝 針腳 CAD 符號、佔位空間與 3D 模型
VQFN (RHB) 32 Ultra Librarian

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