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TAC5142 現行 具有 103dB 動態範圍 ADC 與 110dB 動態範圍 DAC 的硬體控制立體聲道音訊轉碼器 PCM code with >10dB higher SNR for both ADC and DAC

產品詳細資料

Number of ADC channels 4 Number of DAC channels 2 Digital audio interface DSP, I2S, L, R Control interface I2C Analog inputs 6 Analog outputs 6 Features Matrix mixing, Phase-locked loop (PLL), Stereo headphone amplifier, Stereo speaker amplifier Sampling rate (max) (kHz) 96 Rating Catalog ADC SNR (typ) (dB) 90 DAC SNR (typ) (dB) 100 Operating temperature range (°C) -40 to 85
Number of ADC channels 4 Number of DAC channels 2 Digital audio interface DSP, I2S, L, R Control interface I2C Analog inputs 6 Analog outputs 6 Features Matrix mixing, Phase-locked loop (PLL), Stereo headphone amplifier, Stereo speaker amplifier Sampling rate (max) (kHz) 96 Rating Catalog ADC SNR (typ) (dB) 90 DAC SNR (typ) (dB) 100 Operating temperature range (°C) -40 to 85
VQFN (RHB) 32 25 mm² (5 mm × 5 mm)
  • Stereo Audio DAC:
    • 100-dB (A-Weighted) Signal-to-Noise Ratio
    • 16-/20-/24-/32-Bit Data
    • Supports Rates From 8 kHz to 96 kHz
    • 3D/Bass/Treble/EQ/De-Emphasis Effects
  • Stereo Audio ADC:
    • 92-dB (A-Weighted) Signal-to-Noise Ratio
    • Supports Rates From 8 kHz to 96 kHz
  • Six Audio Input Pins:
    • Two Stereo Differential/Single-Ended Inputs
  • Six Audio Output Drivers:
    • Stereo 8-, 500-mW/Channel Speaker Drive Capability
    • Stereo Fully-Differential or Single-Ended Headphone Drivers
    • Fully Differential Stereo Line Outputs
  • Low Power: 14-mW Stereo, 48-kHz Playback With 3.3-V Analog Supply
  • Programmable Input/Output Analog Gains
  • Automatic Gain Control (AGC) for Recording
  • Programmable Microphone Bias Level
  • Programmable PLL for Flexible Clock Generation
  • I2C™ Control Bus
  • Audio Serial Data Bus Supports I2S™, Left-/Right-Justified, DSP, and TDM Modes
  • Extensive Modular Power Control
  • Power Supplies:
    • Analog: 2.7 V to 3.6 V
    • Digital Core: 1.65 V to 1.95 V
    • Digital I/O: 1.1 V to 3.6 V
  • Available Packages: 5-mm × 5-mm, 32-Pin QFN

I2C, I2S are trademarks of NXP Semiconductors.
All other trademarks are the property of their respective owners.

  • Stereo Audio DAC:
    • 100-dB (A-Weighted) Signal-to-Noise Ratio
    • 16-/20-/24-/32-Bit Data
    • Supports Rates From 8 kHz to 96 kHz
    • 3D/Bass/Treble/EQ/De-Emphasis Effects
  • Stereo Audio ADC:
    • 92-dB (A-Weighted) Signal-to-Noise Ratio
    • Supports Rates From 8 kHz to 96 kHz
  • Six Audio Input Pins:
    • Two Stereo Differential/Single-Ended Inputs
  • Six Audio Output Drivers:
    • Stereo 8-, 500-mW/Channel Speaker Drive Capability
    • Stereo Fully-Differential or Single-Ended Headphone Drivers
    • Fully Differential Stereo Line Outputs
  • Low Power: 14-mW Stereo, 48-kHz Playback With 3.3-V Analog Supply
  • Programmable Input/Output Analog Gains
  • Automatic Gain Control (AGC) for Recording
  • Programmable Microphone Bias Level
  • Programmable PLL for Flexible Clock Generation
  • I2C™ Control Bus
  • Audio Serial Data Bus Supports I2S™, Left-/Right-Justified, DSP, and TDM Modes
  • Extensive Modular Power Control
  • Power Supplies:
    • Analog: 2.7 V to 3.6 V
    • Digital Core: 1.65 V to 1.95 V
    • Digital I/O: 1.1 V to 3.6 V
  • Available Packages: 5-mm × 5-mm, 32-Pin QFN

I2C, I2S are trademarks of NXP Semiconductors.
All other trademarks are the property of their respective owners.

The TLV320AIC31 is a low-power stereo audio codec with a stereo headphone amplifier, as well as multiple inputs and outputs, programmable in single-ended or fully-differential configurations. Extensive register-based power control is included, enabling stereo 48-kHz digital-to-analog converter (DAC) playback as low as 14 mW from a 3.3-V analog supply, making it ideal for portable, battery-powered audio and telephony applications.

The record path of the TLV320AIC31 contains integrated microphone bias, a digitally-controlled stereo microphone pre-amp, and automatic gain control (AGC), with mix/mux capability among the multiple analog inputs. The playback path includes mix/mux capability from the stereo DAC and selected inputs, through programmable volume controls to the various outputs.

The TLV320AIC31 contains four high-power output drivers as well as two fully differential output drivers. The high-power output drivers are capable of driving a variety of load configurations, including up to four channels of single-ended, 16- speakers in a BTL configuration at 500 mW per channel.

The stereo audio DAC supports sampling rates from 8 kHz to 96 kHz and includes programmable digital filtering in the DAC path for 3D, bass/treble/midrange effects, speaker equalization, and de-emphasis for 32-kHz, 44.1-kHz, and 48-kHz rates. The stereo-audio analog-to-digital converter (ADC) supports sampling rates from 8 kHz to 96 kHz and is preceded by programmable gain amplifiers providing up to +59.5 dB analog gain for low-level microphone inputs.

The serial control bus supports the I2C protocol, while the serial-audio data bus is programmable for I2S, left-/right-justified, DSP, or TDM modes. A highly programmable PLL is included for flexible clock generation and support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, with special attention paid to the most popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks.

The TLV320AIC31 operates from an analog supply of 2.7 V to 3.6 V, a digital core supply of 1.65 V to 1.95 V, and a digital I/O supply of 1.1 V to 3.6 V. The device is available in a 5 × 5 mm, 32-lead QFN package.

The TLV320AIC31 is a low-power stereo audio codec with a stereo headphone amplifier, as well as multiple inputs and outputs, programmable in single-ended or fully-differential configurations. Extensive register-based power control is included, enabling stereo 48-kHz digital-to-analog converter (DAC) playback as low as 14 mW from a 3.3-V analog supply, making it ideal for portable, battery-powered audio and telephony applications.

The record path of the TLV320AIC31 contains integrated microphone bias, a digitally-controlled stereo microphone pre-amp, and automatic gain control (AGC), with mix/mux capability among the multiple analog inputs. The playback path includes mix/mux capability from the stereo DAC and selected inputs, through programmable volume controls to the various outputs.

The TLV320AIC31 contains four high-power output drivers as well as two fully differential output drivers. The high-power output drivers are capable of driving a variety of load configurations, including up to four channels of single-ended, 16- speakers in a BTL configuration at 500 mW per channel.

The stereo audio DAC supports sampling rates from 8 kHz to 96 kHz and includes programmable digital filtering in the DAC path for 3D, bass/treble/midrange effects, speaker equalization, and de-emphasis for 32-kHz, 44.1-kHz, and 48-kHz rates. The stereo-audio analog-to-digital converter (ADC) supports sampling rates from 8 kHz to 96 kHz and is preceded by programmable gain amplifiers providing up to +59.5 dB analog gain for low-level microphone inputs.

The serial control bus supports the I2C protocol, while the serial-audio data bus is programmable for I2S, left-/right-justified, DSP, or TDM modes. A highly programmable PLL is included for flexible clock generation and support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, with special attention paid to the most popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks.

The TLV320AIC31 operates from an analog supply of 2.7 V to 3.6 V, a digital core supply of 1.65 V to 1.95 V, and a digital I/O supply of 1.1 V to 3.6 V. The device is available in a 5 × 5 mm, 32-lead QFN package.

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技術文件

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 Low Power Stereo Audio Codec for Portable Audio/Telephony datasheet (Rev. C) 2008/11/12
應用說明 Out-of-Band Noise Measurement Issues for Audio Devices (Rev. A) 2019/12/31
應用說明 Audio Serial Interface Configurations for Audio Codecs (Rev. A) 2019/6/27
應用說明 Interfacing an I2S Device to an MSP430 Device (Rev. A) 2010/3/22
應用說明 Configuring I2S to Generate BCLK from Codec Devices & WCLK from McBSP Port 2009/7/8
應用說明 Using TLV320AIC3x Digital Audio Data Serial Interface w/TDM Support 2006/7/5
應用說明 TLV320AIC3x WinCE 5.0 Drivers 2005/9/27

設計與開發

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驅動程式或資料庫

TLV320AIC3XSW-LINUX — 適用於 TLV320AIC3X 的 Linux 驅動程式

The Linux driver supports the TLV320AIC3x family of low-power stereo CODECs, and communication through the I2C bus and interfaces with the Linux Dynamic Audio Power Management for Portable Devices (DAPM) class.

Linux main line status

Available in Linux main line: Yes
Available through git.ti.com: N/A

(...)

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模擬型號

TLV320AIC31 IBIS Model

SLAM113.ZIP (86 KB) - IBIS 模型
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計算工具

COEFFICIENT-CALC — Coefficient Calculator For Digital Biquad Filters

COEFFICIENT-CALC (TIBQ) calculates the coefficients for the digital filter biquad transfer function implemented in TI audio codecs. The characteristics of the digital filter are adjusted by selecting a filter type and moving a control point within a window that shows the transfer function gain and (...)

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封裝 針腳 CAD 符號、佔位空間與 3D 模型
VQFN (RHB) 32 Ultra Librarian

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