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I2C、I3C 與 SPI IC
I2C 與 SPI 通用 I/O (GPIO)

TCA6424A

現行

具中斷、重設和配置暫存器的 24 位元轉換 1.65 至 5.5-V I2C/SMBus I/O 擴展器

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產品規格表

TCA6424A

現行
產品規格表 立即訂購

產品詳細資料

Number of I/Os 24 Features Adjustable I/O level, Configuration registers, Interrupt pin, Reset pin Addresses 2 Rating Catalog Frequency (max) (MHz) 0.4 Operating temperature range (°C) -40 to 85
Number of I/Os 24 Features Adjustable I/O level, Configuration registers, Interrupt pin, Reset pin Addresses 2 Rating Catalog Frequency (max) (MHz) 0.4 Operating temperature range (°C) -40 to 85
UQFN (RGJ) 32 25 mm² (5 mm × 5 mm)
  • Operating power-supply voltage range of 1.65 V to 5.5 V
  • Allows bidirectional voltage-level translation and GPIO expansion between:
    • 1.8-V SCL/SDA and 1.8-V, 2.5-V, 3.3-V, or 5-V P Port
    • 2.5-V SCL/SDA and 1.8-V, 2.5-V, 3.3-V, or 5-V P Port
    • 3.3-V SCL/SDA and 1.8-V, 2.5-V, 3.3-V, or 5-V P Port
    • 5-V SCL/SDA and 1.8-V, 2.5-V, 3.3-V, or 5-V P Port
  • I2C to Parallel port expander
  • Low standby current consumption of 1 µA
  • Schmitt-Trigger action allows slow input transition and better switching noise immunity at the SCL and SDA inputs
    • Vhys = 0.18 V Typ at 1.8 V
    • Vhys = 0.25 V Typ at 2.5 V
    • Vhys = 0.33 V Typ at 3.3 V
    • Vhys = 0.5 V Typ at 5 V
  • 5-V Tolerant I/O ports
  • Active-low reset input ( RESET)
  • Open-drain active-low interrupt output ( INT)
  • 400-kHz Fast I2C Bus
  • Input/output configuration register
  • Polarity inversion register
  • Internal power-on reset
  • Power up with all channels configured as inputs
  • No glitch on power up
  • Noise filter on SCL/SDA inputs
  • Latched outputs with high-current drive maximum capability for directly driving LEDs
  • Latch-up performance exceeds 100 mA per JESD 78, class II
  • ESD protection exceeds JESD 22
    • 2000-V Human-body model (A114-A)
    • 200-V Machine model (A115-A)
    • 1000-V Charged-device model (C101)
  • Operating power-supply voltage range of 1.65 V to 5.5 V
  • Allows bidirectional voltage-level translation and GPIO expansion between:
    • 1.8-V SCL/SDA and 1.8-V, 2.5-V, 3.3-V, or 5-V P Port
    • 2.5-V SCL/SDA and 1.8-V, 2.5-V, 3.3-V, or 5-V P Port
    • 3.3-V SCL/SDA and 1.8-V, 2.5-V, 3.3-V, or 5-V P Port
    • 5-V SCL/SDA and 1.8-V, 2.5-V, 3.3-V, or 5-V P Port
  • I2C to Parallel port expander
  • Low standby current consumption of 1 µA
  • Schmitt-Trigger action allows slow input transition and better switching noise immunity at the SCL and SDA inputs
    • Vhys = 0.18 V Typ at 1.8 V
    • Vhys = 0.25 V Typ at 2.5 V
    • Vhys = 0.33 V Typ at 3.3 V
    • Vhys = 0.5 V Typ at 5 V
  • 5-V Tolerant I/O ports
  • Active-low reset input ( RESET)
  • Open-drain active-low interrupt output ( INT)
  • 400-kHz Fast I2C Bus
  • Input/output configuration register
  • Polarity inversion register
  • Internal power-on reset
  • Power up with all channels configured as inputs
  • No glitch on power up
  • Noise filter on SCL/SDA inputs
  • Latched outputs with high-current drive maximum capability for directly driving LEDs
  • Latch-up performance exceeds 100 mA per JESD 78, class II
  • ESD protection exceeds JESD 22
    • 2000-V Human-body model (A114-A)
    • 200-V Machine model (A115-A)
    • 1000-V Charged-device model (C101)

The bidirectional voltage level translation in the TCA6424A is provided through VCCI. VCCI should be connected to the VCC of the external SCL/SDA lines. This indicates the VCC level of the I2C bus to the TCA6424A. The voltage level on the P-port of the TCA6424A is determined by the VCCP.

The TCA6424A consists of three 8-bit Configuration (input or output selection), Input, Output, and Polarity Inversion (active high) registers. At power on, the I/Os are configured as inputs. However, the system controller can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each input or output is kept in the corresponding input or output register. The polarity of the Input Port register can be inverted with the Polarity Inversion register. All registers can be read by the system controller.

The system controller can reset the TCA6424A in the event of a timeout or other improper operation by asserting a low in the RESET input. The power-on reset puts the registers in their default state and initializes the I2C/SMBus state machine. The RESET pin causes the same reset/initialization to occur without depowering the part.

The TCA6424A open-drain interrupt ( INT) output is activated when any input state differs from its corresponding Input Port register state and is used to indicate to the system controller that an input state has changed.

INT can be connected to the interrupt input of a microcontroller. By sending an interrupt signal on this line, the remote I/O can inform the microcontroller if there is incoming data on its ports without having to communicate via the I2C bus. Thus, the TCA6424A can remain a simple target device.

The device P-port outputs have high-current sink capabilities for directly driving LEDs while consuming low device current.

One hardware pin (ADDR) can be used to program and vary the fixed I2C address and allow up to two devices to share the same I2C bus or SMBus.

The bidirectional voltage level translation in the TCA6424A is provided through VCCI. VCCI should be connected to the VCC of the external SCL/SDA lines. This indicates the VCC level of the I2C bus to the TCA6424A. The voltage level on the P-port of the TCA6424A is determined by the VCCP.

The TCA6424A consists of three 8-bit Configuration (input or output selection), Input, Output, and Polarity Inversion (active high) registers. At power on, the I/Os are configured as inputs. However, the system controller can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each input or output is kept in the corresponding input or output register. The polarity of the Input Port register can be inverted with the Polarity Inversion register. All registers can be read by the system controller.

The system controller can reset the TCA6424A in the event of a timeout or other improper operation by asserting a low in the RESET input. The power-on reset puts the registers in their default state and initializes the I2C/SMBus state machine. The RESET pin causes the same reset/initialization to occur without depowering the part.

The TCA6424A open-drain interrupt ( INT) output is activated when any input state differs from its corresponding Input Port register state and is used to indicate to the system controller that an input state has changed.

INT can be connected to the interrupt input of a microcontroller. By sending an interrupt signal on this line, the remote I/O can inform the microcontroller if there is incoming data on its ports without having to communicate via the I2C bus. Thus, the TCA6424A can remain a simple target device.

The device P-port outputs have high-current sink capabilities for directly driving LEDs while consuming low device current.

One hardware pin (ADDR) can be used to program and vary the fixed I2C address and allow up to two devices to share the same I2C bus or SMBus.
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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 TCA6424A Low-Voltage 24-Bit I2C and SMBus I/O Expander With Interrupt Output, Reset, and Configuration Registers datasheet (Rev. D) PDF | HTML 2023/1/30
應用說明 I2C: What is the Auto Increment Feature? PDF | HTML 2024/7/5
應用說明 Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 2024/7/3
應用說明 I2C Dynamic Addressing 2019/4/25
應用說明 Choosing the Correct I2C Device for New Designs PDF | HTML 2016/9/7
選擇指南 I2C Infographic Flyer 2015/12/3
應用說明 Understanding the I2C Bus PDF | HTML 2015/6/30
應用說明 I2C Bus Pull-Up Resistor Calculation PDF | HTML 2015/2/13

設計與開發

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開發板

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IO-EXPANDER-EVM — IO-EXPANDER-EVM：I2C 和 SMBus IO 擴展器評估模組

IO 擴展器評估模組 (EVM) 可讓您評估 TI 的 SMBus 與 I2C IO 擴展器線路裝置產品組合。TCA6424A 和 TCA9539 都安裝在電路板上。24 針腳 TSSOP 元件封裝還支援 TCA6408A、TCA6416A、TCA9534、TCA9534A、TCA9535、TCA9538, TCA9554、TCA9554A 和 TCA9555。

使用指南: PDF
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韌體

SLVC564 — I/O Expander Software and Firmware Package

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模擬型號

TCA6424A IBIS Model

SCPM027.ZIP (145 KB) - IBIS 模型
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設計工具

I2C-DESIGNER — I2C 設計工具

使用 I2C 設計工具快速解決 I2C 設計中在定址、電壓位準和頻率方面的衝突。輸入主裝置和從屬裝置的參數，自動產生 I2C 樹狀結構，或輕鬆建置自訂解決方案。此工具將協助設計人員節省時間並符合 I2C 標準，提供關於偵錯缺失確認、選擇上拉電阻以及滿足 I2C 匯流排最大電容負載的指導。 
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參考設計

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此經驗證的參考設計是完整的四通道 SDI 聚合與去聚合解決方案。一個 TLK10022 用於將四個同步 HD-SDI 源聚合到一個 5.94Gbps 串列鏈路中。序列資料透過銅纜或光纖傳輸，其中第二個 TLK10022 用於去聚合並無縫地重新顯示原始視訊內容。

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參考設計

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參考設計

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UQFN (RGJ) 32 Ultra Librarian
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