產品規格表
TCA6418E
- Operating Power-Supply Voltage Range of 1.65 V to 3.6 V
- 18 GPIOs Configurable as Inputs or Outputs
- ESD Protection Exceeds JESD 22 on Non-GPIO Pins
- 2000-V Human Body Model (A114-A)
- 1000-V Charged Device Model (C101)
- Low Standby (Idle) Current Consumption: 3 µA
- Supports 1-MHz Fast Mode Plus I2C Bus
- Open-Drain Active-Low Interrupt Output, Asserted When Key is Pressed
or Key is Released - Selectable Debounce Time of 50 µs
- Schmitt-Trigger Action Allows Slow Input Transition and
Better Switching Noise Immunity at the SCL and SDA Inputs:
Typical Vhys at 1.8 V is 0.18 V - Latch-Up Performance Exceeds 200 mA Per JESD 78, Class II
- Very Small Package
- WCSP (YFP): 2 mm × 2 mm; 0.4 mm pitch
The TCA6418E is a 18 channel GPIO expansion device with integrated ESD protection. It can operate from 1.65 V to 3.6 V and has 18 general purpose inputs/outputs (GPIO) that can be used via the I2C interface [serial clock (SCL), serial data (SDA)].
The major benefit of this device is it frees up the processor from having to individually monitor changes in multiple inputs and also frees up the GPIOs on the processor to drive other outputs.. This provides power and bandwidth savings. The TCA6418E is also ideal for usage with processors that have limited GPIOs.
技術文件
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| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | I2C Controlled 18 Channel GPIO Expander datasheet | 2012/9/5 | |||
| 應用說明 | Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) | PDF | HTML | 2024/7/3 | |||
| 應用說明 | I2C Dynamic Addressing | 2019/4/25 | ||||
| 應用說明 | Choosing the Correct I2C Device for New Designs | PDF | HTML | 2016/9/7 | |||
| 應用說明 | Understanding the I2C Bus | PDF | HTML | 2015/6/30 | |||
| 應用說明 | Maximum Clock Frequency of I2C Bus Using Repeaters | 2015/5/15 | ||||
| 應用說明 | I2C Bus Pull-Up Resistor Calculation | PDF | HTML | 2015/2/13 |
設計與開發
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設計工具
I2C-DESIGNER — I2C 設計工具
使用 I2C 設計工具快速解決 I2C 設計中在定址、電壓位準和頻率方面的衝突。輸入主裝置和從屬裝置的參數,自動產生 I2C 樹狀結構,或輕鬆建置自訂解決方案。此工具將協助設計人員節省時間並符合 I2C 標準,提供關於偵錯缺失確認、選擇上拉電阻以及滿足 I2C 匯流排最大電容負載的指導。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| DSBGA (YFP) | 25 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。