SN74LVC11A

現行

具有 24mA 驅動強度的三通道三輸入 1.1V 至 3.6V AND 閘

立即訂購

產品規格表

document-pdfAcrobat SN74LVC11A Triple 3-Input AND Gates datasheet (Rev. A) (英文) PDF | HTML

SN74LVC11A

現行

產品規格表

立即訂購

產品詳細資料

Technology family

LVC

Number of channels

Inputs per channel

IOL (max) (mA)

IOH (max) (mA)

-24

Input type

Standard CMOS

Output type

Push-Pull

Features

Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)

Data rate (max) (Mbps)

100

Rating

Catalog

Operating temperature range (°C)

-40 to 125

Technology family

LVC

Number of channels

Inputs per channel

IOL (max) (mA)

IOH (max) (mA)

-24

Input type

Standard CMOS

Output type

Push-Pull

Features

Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)

Data rate (max) (Mbps)

100

Rating

Catalog

Operating temperature range (°C)

-40 to 125

TSSOP (PW)

32 mm² (5 mm × 6.4 mm)

SOIC (D)

51.9 mm² (8.65 mm × 6 mm)

WQFN (BQA)

7.5 mm² (3 mm × 2.5 mm)

Operating range from 1.1V to 3.6V
5.5V tolerant input pins
Supports standard pinouts
Latch-up performance exceeds 250mAper JESD 17
ESD protection exceeds JESD 22
- 2000V Human-Body Model (A114-A)
- 1000V Charged-Device Model (C101)

Operating range from 1.1V to 3.6V
5.5V tolerant input pins
Supports standard pinouts
Latch-up performance exceeds 250mAper JESD 17
ESD protection exceeds JESD 22
- 2000V Human-Body Model (A114-A)
- 1000V Charged-Device Model (C101)

This device contains three independent 3-input AND gates. Each gate performs the Boolean function Y = A × B × C in positive logic.

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