SN74LV8T7541
- Wide operating range of 1.65V to 5.5V
- 5.5V tolerant input pins
- LVxT enhanced inputs combined with
open-drain outputs provide maximum voltage translation
flexibility:
- Over 6.67Mbps operation, (RPU = 1kΩ,CL = 30pF)
- Up translation from 1.2V to 5V with 1.8V supply
- Down translation from 5V to 0.8V or even less with any valid supply
- Supports standard function pinout
- Latch-up performance exceeds 250mAper JESD 17
The SN74LV8T7541 is an octal buffer with open-drain outputs.
The input is designed with a reduced threshold circuit to support up translation when the supply voltage is larger than the input voltage. Additionally, the 5V tolerant input pins enable down translation when the input voltage is larger than the supply voltage. The output level is always referenced to the supply voltage (VCC) and supports 1.8V, 2.5V, 3.3V, and 5V CMOS levels.
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| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | SN74LV8T7541 Octal Buffers With Open-Drain Outputs and Logic-Level Shifter datasheet | PDF | HTML | 2025/11/4 |
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開發板
14-24-LOGIC-EVM — 適用於 14 針腳至 24 針腳 D、DB、DGV、DW、DYY、NS 和 PW 封裝的邏輯產品通用評估模組
14-24-LOGIC-EVM 評估模組 (EVM) 設計用於支援任何 14 針腳至 24 針腳 D、DW、DB、NS、PW、DYY 或 DGV 封裝的任何邏輯裝置。
開發板
14-24-NL-LOGIC-EVM — 適用於 14 針腳至 24 針腳無引線封裝的邏輯產品通用評估模組
14-24-NL-LOGIC-EVM 是一款靈活的評估模組 (EVM),設計用於支援任何具有 14 針腳至 24 針腳 BQA、BQB、RGY、RSV、RJW 或 RHL 封裝的邏輯或轉換裝置。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VSSOP (DGS) | 20 | Ultra Librarian |
| TSSOP (PW) | 20 | Ultra Librarian |
| VQFN (RKS) | 20 | Ultra Librarian |