SN74LV8153
- Single-Wire Serial Data Input
- Compatible With UART Serial-Data Format
- Up to Eight Devices (64-Bit Parallel) Can Share the Same Bus by Using Different Combinations of A0, A1, A2
- Up to 40 mA Current Drive in Open-Collector Mode for Driving LEDs
- Outputs Can be Configured as Open-Collector or Push-Pull
- Internal Oscillator and Counter for Automatic Data-Rate Detection
- Output Levels Are Referenced to VCC2 and Can Be Configured From 3 V to 12 V
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 1000-V Charged-Device Model (C101)
The SN74LV8153 is a serial-to-parallel data converter. It accepts serial input data and outputs 8-bit parallel data.
The automatic data-rate detection feature of the SN74LV8153 eliminates the need for an external oscillator and helps with cost and board real-estate savings.
The OUTSEL pin is used to choose between open collector and push-pull outputs. The open-collector option is suitable when this device is used in applications such as LED interface, where high drive current is required. SOUT is the output that acknowledges reception of the serial data.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC1 through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | SN74LV8153 datasheet | 2003/12/17 | |||
| 應用說明 | Power-Up Behavior of Clocked Devices (Rev. B) | PDF | HTML | 2022/12/15 |
設計與開發
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14-24-LOGIC-EVM — 適用於 14 針腳至 24 針腳 D、DB、DGV、DW、DYY、NS 和 PW 封裝的邏輯產品通用評估模組
14-24-LOGIC-EVM 評估模組 (EVM) 設計用於支援任何 14 針腳至 24 針腳 D、DW、DB、NS、PW、DYY 或 DGV 封裝的任何邏輯裝置。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| TSSOP (PW) | 20 | Ultra Librarian |
| PDIP (N) | 20 | Ultra Librarian |