SN74LS75

現行

四路雙穩態鎖存器

立即訂購

產品規格表

document-pdfAcrobat 4-Bit Bistable Latches datasheet (英文)

SN74LS75

現行

產品規格表

立即訂購

產品詳細資料

Number of channels

4

Technology family

LS

Input type

Bipolar

Output type

TTL

Clock frequency (max) (MHz)

35

IOL (max) (mA)

8

IOH (max) (mA)

-0.4

Supply current (max) (µA)

53000

Features

Very high speed (tpd 5-10ns)

Operating temperature range (°C)

0 to 70

Rating

Catalog

Number of channels

4

Technology family

LS

Input type

Bipolar

Output type

TTL

Clock frequency (max) (MHz)

35

IOL (max) (mA)

8

IOH (max) (mA)

-0.4

Supply current (max) (µA)

53000

Features

Very high speed (tpd 5-10ns)

Operating temperature range (°C)

0 to 70

Rating

Catalog

PDIP (N)

16

181.42 mm² (19.3 mm × 9.4 mm)

SOIC (D)

16

59.4 mm² (9.9 mm × 6 mm)

SOP (NS)

16

79.56 mm² (10.2 mm × 7.8 mm)

These latches are ideally suited for use as temporary storage for binary information between processing units and input/output or indicator units. Information present at a data (D) input is transferred to the Q output when the enable (C) is high and the Q output will follow the data input as long as the enable remains high. When the enable goes low, the information (that was present at the data input at the time the transition occurred) is retained at the Q output until the enable is permitted to go high.

The '75 and 'LS75 feature complementary Q and Q\ outputs from a 4-bit latch, and are available in various 16-pin packages. For higher component density applications, the '77 and 'LS77 4-bit latches are available in 14-pin flat packages.

These circuits are completely compatible with all popular TTL families. All inputs are diode-clamped to minimize transmission-line effects and simplify system design. Series 54 and 54LS devices are characterized for operation over the full military temperature range of -55°C to 125°C; Series 74, and 74LS devices are characterized for operation from 0°C to 70°C.

These latches are ideally suited for use as temporary storage for binary information between processing units and input/output or indicator units. Information present at a data (D) input is transferred to the Q output when the enable (C) is high and the Q output will follow the data input as long as the enable remains high. When the enable goes low, the information (that was present at the data input at the time the transition occurred) is retained at the Q output until the enable is permitted to go high.

The '75 and 'LS75 feature complementary Q and Q\ outputs from a 4-bit latch, and are available in various 16-pin packages. For higher component density applications, the '77 and 'LS77 4-bit latches are available in 14-pin flat packages.

These circuits are completely compatible with all popular TTL families. All inputs are diode-clamped to minimize transmission-line effects and simplify system design. Series 54 and 54LS devices are characterized for operation over the full military temperature range of -55°C to 125°C; Series 74, and 74LS devices are characterized for operation from 0°C to 70°C.

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