SN74HCT645

現行

具有 3 態輸出的八路匯流排收發器

立即訂購

產品規格表

document-pdfAcrobat SN54HCT645, SN74HCT645 datasheet (Rev. D) (英文)

SN74HCT645

現行

產品規格表

立即訂購

產品詳細資料

Number of channels

8

IOL (max) (mA)

6

IOH (max) (mA)

-6

Input type

TTL

Output type

CMOS

Features

Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode

Technology family

HCT

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Number of channels

8

IOL (max) (mA)

6

IOH (max) (mA)

-6

Input type

TTL

Output type

CMOS

Features

Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode

Technology family

HCT

Rating

Catalog

Operating temperature range (°C)

-40 to 85

SOIC (DW)

20

131.84 mm² (12.8 mm × 10.3 mm)

PDIP (N)

20

228.702 mm² (24.33 mm × 9.4 mm)

TSSOP (PW)

20

41.6 mm² (6.5 mm × 6.4 mm)

Operating Voltage Range of 4.5 V to 5.5 V
High-Current 3-State Outputs Can Drive Up To 15 LSTTL Loads
Low Power Consumption, 80-µA Max I_CC
Typical t_pd = 14 ns
±6-mA Output Drive at 5 V
Low Input Current of 1 µA Max
Inputs Are TTL-Voltage Compatible
True Logic

Operating Voltage Range of 4.5 V to 5.5 V
High-Current 3-State Outputs Can Drive Up To 15 LSTTL Loads
Low Power Consumption, 80-µA Max I_CC
Typical t_pd = 14 ns
±6-mA Output Drive at 5 V
Low Input Current of 1 µA Max
Inputs Are TTL-Voltage Compatible
True Logic

These octal bus transceivers are designed for asynchronous two-way communication between data buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending upon the level at the direction-control (DIR) input. The output-enable (OE)\ input can be used to disable the device so the buses are effectively isolated.

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重要文件	類型	標題	格式選項	下載最新的英文版本		日期
*	資料表	SN54HCT645, SN74HCT645 datasheet (Rev. D)				2003/8/19

SN74HCT645

具有 3 態輸出的八路匯流排收發器

SN74HCT645

產品詳細資料

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