SN74HCT240
- Operating voltage range of 4.5V to 5.5V
- High-current outputs drive up to 15 LSTTL loads
- Low power consumption, 80µA max ICC
- Typical tpd = 12 ns
- ±6mA output drive at 5V
- Low input current of 1µA max
- Inputs are TTL-voltage compatible
- 3-state outputs drive bus lines or buffer memory address registers
These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HCT240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.
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技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | SNx4HCT240 Octal Buffers and Line Drivers With 3-State Outputs datasheet (Rev. H) | PDF | HTML | 2024/8/22 |
設計與開發
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14-24-LOGIC-EVM — 適用於 14 針腳至 24 針腳 D、DB、DGV、DW、DYY、NS 和 PW 封裝的邏輯產品通用評估模組
14-24-LOGIC-EVM 評估模組 (EVM) 設計用於支援任何 14 針腳至 24 針腳 D、DW、DB、NS、PW、DYY 或 DGV 封裝的任何邏輯裝置。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| PDIP (N) | 20 | Ultra Librarian |
| SOP (NS) | 20 | Ultra Librarian |
| TSSOP (PW) | 20 | Ultra Librarian |
| VSSOP (DGS) | 20 | Ultra Librarian |
| SOIC (DW) | 20 | Ultra Librarian |