SN74CB3T3257
- Output voltage translation tracks VCC
- Supports mixed-mode signal
operation on all data I/O ports
- 5V input down to 3.3V output level shift with 3.3V VCC
- 5V/3.3V input down to 2.5V output level shift with 2.5V VCC
- 5V-tolerant I/Os with device powered up or powered down
- Bidirectional data flow with near-zero propagation delay
- Low ON-state resistance (ron) characteristics (ron = 5Ω typ)
- Low input/output capacitance minimizes loading (Cio(OFF) = 5pF typ)
- Data and control inputs provide undershoot clamp diodes
- Low power consumption (ICC = 20µA max)
- VCC operating range from 2.3V to 3.6V
- Data I/Os support 0V to 5V signaling levels (0.8V, 1.2V, 1.5V, 1.8V, 2.5V, 3.3V, 5V)
- Control inputs can be driven by TTL or 5V/3.3V CMOS outputs
- Ioff supports partial-power-down mode operation
- Latch-up performance exceeds 250mA per JESD 17
- ESD performance tested per JESD
22
- 2000V human-body model (A114B, Class II)
- 1000V charged-device model (C101)
The SN74CB3T3257 is a high-speed TTL-compatible FET multiplexer/demultiplexer with low ON-state resistance (ron), allowing for minimal propagation delay. The device fully supports mixed-mode signal operation on all data I/O ports by providing voltage translation that tracks VCC. The SN74CB3T3257 supports systems using 5V TTL, 3.3V LVTTL, and 2.5V CMOS switching standards, as well as user-defined switching levels.
This device is fully specified for partial-power-down applications using Ioff. The Ioff feature verifies that damaging current does not backflow through the device when the device is powered down. The device has isolation during power off.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | SN74CB3T3257 4-Bit 1-of-2 FET Multiplexer/Demultiplexer 2.5V/3.3V Low-Voltage Bus Switch With 5V-Tolerant Level Shifter datasheet (Rev. B) | PDF | HTML | 2025/12/9 | ||
| 應用說明 | Selecting the Correct Texas Instruments Signal Switch (Rev. E) | PDF | HTML | 2022/6/2 | |||
| 應用說明 | Multiplexers and Signal Switches Glossary (Rev. B) | PDF | HTML | 2021/12/1 | |||
| Application brief | Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) | PDF | HTML | 2021/1/6 |
設計與開發
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LEADED-ADAPTER1 — 適用於快速測試 TI 的 5、8、10、16 及 24 針腳引線封裝的表面貼裝至 DIP 接頭適配器
EVM-LEADED1 板可用於快速測試和搭建 TI 常見的有引腳封裝 此電路板具備板上配置，可將 TI 的 D、DBQ、DCT、DCU、DDF、DGS、DGV 和 PW 表面黏著封裝轉換為 100mil DIP 排針。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| TVSOP (DGV) | 16 | Ultra Librarian |
| TSSOP (PW) | 16 | Ultra Librarian |
| SOT-23-THN (DYY) | 16 | Ultra Librarian |
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