SN74CB3Q3384A
- High-Bandwidth Data Path (up to 500MHz)
- 5V Tolerant I/Os With Device Powered Up or Powered Down
- Low and Flat ON-State Resistance (ron) Characteristics Over Operating Range (ron = 3Ω Typ)
- Rail-to-Rail Switching on Data I/O Ports
- 0- to 5V Switching With 3.3V VCC
- 0- to 3.3V Switching With 2.5V VCC
- Bidirectional Data Flow With Near-Zero Propagation Delay
- Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 4pF Typ)
- Fast Switching Frequency (f OE = 20MHz Max)
- Data and Control Inputs Provide Undershoot Clamp Diodes
- Low Power Consumption (ICC = 1mA Typ)
- VCC Operating Range From 2.3V to 3.6V
- Data I/Os Support 0- to 5V Signaling Levels (0.8V, 1.2V, 1.5V, 1.8V, 2.5V, 3.3V, 5V)
- Control Inputs Can Be Driven by TTL or 5V/3.3V CMOS Outputs
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 100mA Per JESD 78, Class II
- ESD Performance Tested Per JESD 22
- 2000V Human-Body Model (A114-B, Class II)
- 1000V Charged-Device Model (C101)
- Supports Both Digital and Analog Applications: PCI Interface, Differential Signal Interface, Memory Interleaving, Bus Isolation, Low-Distortion Signal Gating
The SN74CB3Q3384A is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q3384A provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems.
The SN74CB3Q3384A is organized as two 5-bit bus switches with separate output-enable (1 OE, 2 OE) inputs. It can be used as two 5-bit bus switches or as one 10-bit bus switch. When OE is low, the associated 5-bit bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the associated 5-bit bus switch is OFF, and a high-impedance state exists between the A and B ports.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging current backflow through the device when it is powered down. The device has isolation during power off.
To ensure the high-impedance state during power up or power down, OE must be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | SN74CB3Q3384A 10-Bit FET Bus Switch 2.5V/3.3V Low-voltage High-bandwidth Bus Switch datasheet (Rev. E) | PDF | HTML | 2026/9/8 | ||
| 應用說明 | Selecting the Correct Texas Instruments Signal Switch (Rev. E) | PDF | HTML | 2022/6/2 | |||
| 應用說明 | Multiplexers and Signal Switches Glossary (Rev. B) | PDF | HTML | 2021/12/1 | |||
| Application brief | Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) | PDF | HTML | 2021/1/6 |
設計與開發
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LEADED-ADAPTER1 — 適用於快速測試 TI 的 5、8、10、16 及 24 針腳引線封裝的表面貼裝至 DIP 接頭適配器
EVM-LEADED1 板可用於快速測試和搭建 TI 常見的有引腳封裝 此電路板具備板上配置,可將 TI 的 D、DBQ、DCT、DCU、DDF、DGS、DGV 和 PW 表面黏著封裝轉換為 100mil DIP 排針。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| TSSOP (PW) | 24 | Ultra Librarian |
| TVSOP (DGV) | 24 | Ultra Librarian |
| SSOP (DBQ) | 24 | Ultra Librarian |
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