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電壓轉換器及電平移位器
電壓轉換器

SN74AVCH2T45

現行

具有可配置電壓轉換和 3 態輸出的雙位元雙電源供電匯流排收發器

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SN74AXCH2T45 現行 具有匯流排電位鎖定功能的 2 位元 0.65V 至 3.6V AXC 雙電源匯流排收發器 Pin-to-pin upgrade with a wider voltage range and improved performance

SN74AVCH2T45

現行
產品規格表 立即訂購

產品詳細資料

Bits (#) 2 Data rate (max) (Mbps) 500 Topology Push-Pull Vin (min) (V) 1.2 Vin (max) (V) 3.6 Vout (min) (V) 1.2 Vout (max) (V) 3.6 Applications GPIO, I2S Features Bus-hold, Overvoltage tolerant inputs, Partial power down (Ioff) Prop delay (ns) 6.6 Technology family AVC Supply current (max) (mA) 0.02 Rating Catalog Operating temperature range (°C) -40 to 85
Bits (#) 2 Data rate (max) (Mbps) 500 Topology Push-Pull Vin (min) (V) 1.2 Vin (max) (V) 3.6 Vout (min) (V) 1.2 Vout (max) (V) 3.6 Applications GPIO, I2S Features Bus-hold, Overvoltage tolerant inputs, Partial power down (Ioff) Prop delay (ns) 6.6 Technology family AVC Supply current (max) (mA) 0.02 Rating Catalog Operating temperature range (°C) -40 to 85
SSOP (DCT) 8 11.8 mm² (2.95 mm × 4 mm) VSSOP (DCU) 8 6.2 mm² (2 mm × 3.1 mm) DSBGA (YZP) 8 2.8125 mm² (— mm × — mm)
  • Available in the Texas Instruments NanoFree™ Package
  • VCC Isolation
  • 2-Rail Design
  • I/Os are 4.6V Tolerant
  • Partial Power-Down-Mode Operation
  • Bus Hold on Data Inputs
  • Maximum Data Rates
    • 500Mbps (1.8V to 3.3V)
    • 320Mbps (< 1.8V to 3.3V)
    • 320Mbps (Level-Shifting to 2.5V or 1.8V)
    • 280Mbps (Level-Shifting to 1.5V)
    • 240Mbps (Level-Shifting to 1.2V)
  • Latch-Up Performance Exceeds 100mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
  • Available in the Texas Instruments NanoFree™ Package
  • VCC Isolation
  • 2-Rail Design
  • I/Os are 4.6V Tolerant
  • Partial Power-Down-Mode Operation
  • Bus Hold on Data Inputs
  • Maximum Data Rates
    • 500Mbps (1.8V to 3.3V)
    • 320Mbps (< 1.8V to 3.3V)
    • 320Mbps (Level-Shifting to 2.5V or 1.8V)
    • 280Mbps (Level-Shifting to 1.5V)
    • 240Mbps (Level-Shifting to 1.2V)
  • Latch-Up Performance Exceeds 100mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22

This 2-bit non-inverting bus transceiver uses two separate configurable power-supply rails. The A ports are designed to track VCCA and accepts any supply voltage from 1.2V to 3.6V. The B ports are designed to track VCCB and accepts any supply voltage from 1.2V to 3.6V. This allows for universal low-voltage bidirectional translation and level-shifting between any of the 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V voltage nodes.

The SN74AVCH2T45 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR pin) input activate either the B-port outputs or the A-port outputs. The device transmits data from the A bus to the B bus when the B-port outputs are activated and from the B bus to the A bus when the A-port outputs are activated. The SN74AVCH2T45 features active bus-hold circuitry, which holds unused or un-driven inputs at a valid logic state. TI does not recommend using pull-up or pull-down resistors with the bus-hold circuitry.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The VCC isolation feature ensures that if either VCC input is at GND, then both outputs are in the high-impedance state. The bus-hold circuitry on the powered-up side always stays active.

Active bus-hold circuitry holds unused or un-driven inputs at a valid logic state. NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This 2-bit non-inverting bus transceiver uses two separate configurable power-supply rails. The A ports are designed to track VCCA and accepts any supply voltage from 1.2V to 3.6V. The B ports are designed to track VCCB and accepts any supply voltage from 1.2V to 3.6V. This allows for universal low-voltage bidirectional translation and level-shifting between any of the 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V voltage nodes.

The SN74AVCH2T45 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR pin) input activate either the B-port outputs or the A-port outputs. The device transmits data from the A bus to the B bus when the B-port outputs are activated and from the B bus to the A bus when the A-port outputs are activated. The SN74AVCH2T45 features active bus-hold circuitry, which holds unused or un-driven inputs at a valid logic state. TI does not recommend using pull-up or pull-down resistors with the bus-hold circuitry.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The VCC isolation feature ensures that if either VCC input is at GND, then both outputs are in the high-impedance state. The bus-hold circuitry on the powered-up side always stays active.

Active bus-hold circuitry holds unused or un-driven inputs at a valid logic state. NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.
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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 SN74AVCH2T45 2-Bit, 2-Supply, Bus Transceiver with Configurable Level-Shifting and Translation and 3-State Outputs datasheet (Rev. I) PDF | HTML 2025/2/11
應用說明 Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators PDF | HTML 2024/10/2
應用說明 Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 2024/7/12
應用說明 Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 2024/7/3
選擇指南 Voltage Translation Buying Guide (Rev. A) 2021/4/15

設計與開發

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開發板

5-8-LOGIC-EVM — 適用於 5 針腳至 8 針腳 DCK、DCT、DCU、DRL 和 DBV 封裝的通用邏輯評估模組

靈活的 EVM 旨在支援任何針腳數為 5 至 8 支且採用 DCK、DCT、DCU、DRL 或 DBV 封裝的裝置。
使用指南: PDF
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開發板

AVCLVCDIRCNTRL-EVM — 適用於方向控制雙向轉換裝置、支援 AVC 和 LVC 的通用 EVM

通用 EVM 的設計可支援一、二、四、八通道 LVC 及 AVC 方向控制的轉換裝置。此外也支援相同通道數量的匯流排保留與汽車 -Q1 裝置。AVC 是低電壓轉換裝置，具較低驅動強度 12mA。LVC 是較高的電壓轉換裝置，範圍從 1.65 到 5.5V 且具較高驅動強度 32mA。

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模擬型號

SN74AVCH2T45 IBIS Model (Rev. B)

SCEM433 (345 KB) - IBIS 模型
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SSOP (DCT) 8 Ultra Librarian
VSSOP (DCU) 8 Ultra Librarian
DSBGA (YZP) 8 Ultra Librarian
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