SN74AVC2T45-Q1
- Qualified for automotive applications
- Control inputs VIH/VIL levels are referenced to VCCA voltage
- Fully configurable dual-rail design allows each port to operate over the full 1.2V to 3.6V power-supply range
-
Operating temperature from -40°C to 105°C
- I/Os are 4.6V tolerant
- Ioff supports partial-power-down mode operation
- Maximum data rates
- 500Mbps (1.8V to 3.3V translation)
- 320Mbps (< 1.8V to 3.3V translation)
- 320Mbps (translate to 2.5V or 1.8V)
- 280Mbps (translate to 1.5V)
- 240Mbps (translate to 1.2V)
- Latch-up performance exceeds 100mA per JESD 78, Class II
- ESD protection exceeds JESD 22
- 8000V human-body model (A114-A)
- 200V machine model (A115-A)
- 1000V charged-device model (C101)
This dual-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2V to 3.6V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.2V to 3.6V. This allows for universal low-voltage bidirectional translation between any of the 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V voltage nodes.
The SN74AVC2T45 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input activate either the B-port outputs or the A-port outputs. The device transmits data from the A bus to the B bus when the B-port outputs are activated and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports always is active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ.
The SN74AVC2T45 is designed so that the DIR input is powered by VCCA.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when powered down.
The VCC isolation feature makes sure that if either VCC input is at GND, both ports are in the high-impedance state.
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技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | SN74AVC2T45-Q1 Automotive Dual-Bit Dual-Supply Bus Transceiver With Configurable Voltage Translation and 3-state Outputs datasheet (Rev. A) | PDF | HTML | 2025/2/10 | ||
| 應用說明 | Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators | PDF | HTML | 2024/10/2 | |||
| 應用說明 | Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators | PDF | HTML | 2024/7/12 | |||
| 應用說明 | Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) | PDF | HTML | 2024/7/3 | |||
| 功能安全資訊 | SN74AVC2T45-Q1 Functional Safety FIT Rate, FMD and Pin FMA | PDF | HTML | 2024/4/17 | |||
| 選擇指南 | Voltage Translation Buying Guide (Rev. A) | 2021/4/15 | ||||
| 更多文件說明 | Automotive Logic Devices Brochure | 2014/8/27 |
設計與開發
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5-8-LOGIC-EVM — 適用於 5 針腳至 8 針腳 DCK、DCT、DCU、DRL 和 DBV 封裝的通用邏輯評估模組
5-8-NL-LOGIC-EVM — 支援 5 至 8 針腳 DPW、DQE、DRY、DSF、DTM、DTQ 和 DTT 封裝的通用邏輯和轉譯 EVM
支援任何具 DTT、DRY、DPW、DTM、DQE、DQM、DSF 或 DTQ 封裝的邏輯或轉換裝置之通用 EVM。可實現靈活評估的電路板設計。
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