SN74AUC1G19
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
- Available in the Texas Instruments NanoFree™ Package
- Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
- Ioff Supports Partial-Power-Down Mode Operation
- Sub-1-V Operable
- ±8-mA Output Drive at 1.8 V VCC
- Maximum tpd of 3 ns at 1.8 V
- Low Power Consumption, 10-µA Maximum ICC
This 1-of-2 decoder/demultiplexer is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.
The SN74AUC1G19 is a 1-of-2 decoder/demultiplexer. This device buffers the data on input A and passes it to the outputs Y0 (true) and Y1 (complement) when the enable (E) input signal is low.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
For more information about AUC Little Logic devices, see Applications of Texas Instruments AUC Sub-1-V Little Logic Devices, SCEA027.
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針腳對針腳的功能與所比較的裝置相同。
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | SN74AUC1G19 1-of-2 Decoder/Demultiplexer datasheet (Rev. E) | PDF | HTML | 2017/6/8 |
設計與開發
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5-8-LOGIC-EVM — 適用於 5 針腳至 8 針腳 DCK、DCT、DCU、DRL 和 DBV 封裝的通用邏輯評估模組
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| DSBGA (YZP) | 6 | Ultra Librarian |
| SOT-SC70 (DCK) | 6 | Ultra Librarian |
| SOT-23 (DBV) | 6 | Ultra Librarian |
| SOT-5X3 (DRL) | 6 | Ultra Librarian |