SN74AHC139
- Operating range 2V to 5.5V
- Designed specifically for high-speed memory decoders and data-transmission systems
- Incorporate two enable inputs to simplify cascading or data reception
- Latch-up performance exceeds 250mA per JESD 17
- ESD protection exceeds JESD 22:
- 2000V human-body model (A114-A)
- 1000V charged-device model (C101)
The SN74AHC139 are dual 2-line to 4-line decoders/demultiplexers designed for 2V to 5.5V VCC operation. These devices are designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding. When used with high-speed memories utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible.
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技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | SN74AHC139 Dual 2- to 4-Bit Decoders/Demultiplexers datasheet (Rev. N) | PDF | HTML | 2025/1/9 |
設計與開發
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14-24-LOGIC-EVM — 適用於 14 針腳至 24 針腳 D、DB、DGV、DW、DYY、NS 和 PW 封裝的邏輯產品通用評估模組
14-24-LOGIC-EVM 評估模組 (EVM) 設計用於支援任何 14 針腳至 24 針腳 D、DW、DB、NS、PW、DYY 或 DGV 封裝的任何邏輯裝置。
14-24-NL-LOGIC-EVM — 適用於 14 針腳至 24 針腳無引線封裝的邏輯產品通用評估模組
14-24-NL-LOGIC-EVM 是一款靈活的評估模組 (EVM)，設計用於支援任何具有 14 針腳至 24 針腳 BQA、BQB、RGY、RSV、RJW 或 RHL 封裝的邏輯或轉換裝置。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SOIC (D) | 16 | Ultra Librarian |
| SSOP (DB) | 16 | Ultra Librarian |
| VQFN (RGY) | 16 | Ultra Librarian |
| PDIP (N) | 16 | Ultra Librarian |
| TVSOP (DGV) | 16 | Ultra Librarian |
| TSSOP (PW) | 16 | Ultra Librarian |
| SOP (NS) | 16 | Ultra Librarian |