SN74ABT541B

現行

具有 TTL 相容 CMOS 輸入和 3 態輸出的 8 通道、4.5-V 至 5.5-V 緩衝器

立即訂購

產品規格表

document-pdfAcrobat SN54ABT541, SN74ABT541B datasheet (Rev. L) (英文)

SN74ABT541B

現行

產品規格表

立即訂購

產品詳細資料

Technology family

ABT

Number of channels

8

IOL (max) (mA)

64

Supply current (max) (µA)

30000

IOH (max) (mA)

-32

Input type

TTL-Compatible CMOS

Output type

3-State

Features

Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Technology family

ABT

Number of channels

8

IOL (max) (mA)

64

Supply current (max) (µA)

30000

IOH (max) (mA)

-32

Input type

TTL-Compatible CMOS

Output type

3-State

Features

Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 85

SOIC (DW)

20

131.84 mm² (12.8 mm × 10.3 mm)

SSOP (DB)

20

56.16 mm² (7.2 mm × 7.8 mm)

TSSOP (PW)

20

41.6 mm² (6.5 mm × 6.4 mm)

PDIP (N)

20

228.702 mm² (24.33 mm × 9.4 mm)

SOP (NS)

20

98.28 mm² (12.6 mm × 7.8 mm)

State-of-the-Art EPIC-IIB™ BiCMOS Design Significantly Reduces Power Dissipation
Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
Typical V_OLP (Output Ground Bounce) < 1 V at V_CC = 5 V, T_A = 25°C
High-Impedance State During Power Up and Power Down
High-Drive Outputs (-32-mA I_OH, 64-mA I_OL)
Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), Ceramic Flat (W) Package, and Plastic (N) and Ceramic (J) DIPs

EPIC-IIB is a trademark of Texas Instruments.

State-of-the-Art EPIC-IIB™ BiCMOS Design Significantly Reduces Power Dissipation
Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
Typical V_OLP (Output Ground Bounce) < 1 V at V_CC = 5 V, T_A = 25°C
High-Impedance State During Power Up and Power Down
High-Drive Outputs (-32-mA I_OH, 64-mA I_OL)
Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), Ceramic Flat (W) Package, and Plastic (N) and Ceramic (J) DIPs

EPIC-IIB is a trademark of Texas Instruments.

The SN54ABT541 and SN74ABT541B octal buffers and line drivers are ideal for driving bus lines or buffering memory address registers. The devices feature inputs and outputs on opposite sides of the package to facilitate printed circuit board layout.

The 3-state control gate is a two-input AND gate with active-low inputs so that if either output-enable (OE1 or OE2) input is high, all eight outputs are in the high-impedance state.

When V_CC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54ABT541 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT541B is characterized for operation from -40°C to 85°C.

The SN54ABT541 and SN74ABT541B octal buffers and line drivers are ideal for driving bus lines or buffering memory address registers. The devices feature inputs and outputs on opposite sides of the package to facilitate printed circuit board layout.

The 3-state control gate is a two-input AND gate with active-low inputs so that if either output-enable (OE1 or OE2) input is high, all eight outputs are in the high-impedance state.

When V_CC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54ABT541 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT541B is characterized for operation from -40°C to 85°C.

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