產品詳細資料

PGA/VGA PGA Number of channels 1 Vs (min) (V) 9 Vs (max) (V) 36 Input type Differential Output type Single-ended Input offset drift (±) (typ) (µV/°C) 0.2 Interface type GPIO BW at Acl (MHz) 8 Acl, min spec gain (V/V) 0.5 Gain (max) (dB) 100 Architecture Bipolar Features Overvoltage protection, Super-beta Vos (offset voltage at 25°C) (typ) (mV) 0.05 Input voltage noise (typ) (µV√Hz) 0.0499 Slew rate (typ) (V/µs) 23 Iq per channel (typ) (mA) 5.3 Gain error (typ) (%) 0.015 Gain drift (max) (ppm/°C) 2 Rating Catalog Operating temperature range (°C) -40 to 125
PGA/VGA PGA Number of channels 1 Vs (min) (V) 9 Vs (max) (V) 36 Input type Differential Output type Single-ended Input offset drift (±) (typ) (µV/°C) 0.2 Interface type GPIO BW at Acl (MHz) 8 Acl, min spec gain (V/V) 0.5 Gain (max) (dB) 100 Architecture Bipolar Features Overvoltage protection, Super-beta Vos (offset voltage at 25°C) (typ) (mV) 0.05 Input voltage noise (typ) (µV√Hz) 0.0499 Slew rate (typ) (V/µs) 23 Iq per channel (typ) (mA) 5.3 Gain error (typ) (%) 0.015 Gain drift (max) (ppm/°C) 2 Rating Catalog Operating temperature range (°C) -40 to 125
VQFN (RGT) 16 9 mm² 3 x 3
  • Differential to single-ended conversion
  • Eight pin-programmable decade (scope) gains
    • G (V/V) = ½, 1, 2, 5, 10, 20, 50, and 100
  • Low gain error drift: ±2ppm/°C (maximum)
  • Faster signal processing:
    • Wide bandwidth: 6.2MHz (G < 10), 2.4MHz (G = 50, 100)
    • High slew rate: 43V/µs at all gains
    • Settling time: 710ns to 0.01% (G < 20)
    • Input stage noise: 8.5nV/√Hz at G > 10V/V
    • Filter option to achieve better SNR
  • Input overvoltage protection to ±40V beyond supplies
  • Input-stage supply range:
    • Single supply: 9V to 36V
    • Dual supply: ±4.5V to ±18V
  • Independent output power-supply pins
  • Output-stage supply range:
    • Single supply: 4.5V to 36V
    • Dual supply: ±2.25V to ±18V
  • Specified temperature range: ­–40°C to +125°C
  • Small package: 3mm × 3mm VQFN
  • Differential to single-ended conversion
  • Eight pin-programmable decade (scope) gains
    • G (V/V) = ½, 1, 2, 5, 10, 20, 50, and 100
  • Low gain error drift: ±2ppm/°C (maximum)
  • Faster signal processing:
    • Wide bandwidth: 6.2MHz (G < 10), 2.4MHz (G = 50, 100)
    • High slew rate: 43V/µs at all gains
    • Settling time: 710ns to 0.01% (G < 20)
    • Input stage noise: 8.5nV/√Hz at G > 10V/V
    • Filter option to achieve better SNR
  • Input overvoltage protection to ±40V beyond supplies
  • Input-stage supply range:
    • Single supply: 9V to 36V
    • Dual supply: ±4.5V to ±18V
  • Independent output power-supply pins
  • Output-stage supply range:
    • Single supply: 4.5V to 36V
    • Dual supply: ±2.25V to ±18V
  • Specified temperature range: ­–40°C to +125°C
  • Small package: 3mm × 3mm VQFN

The PGA848 is a wide-bandwidth, low-noise programmable gain instrumentation amplifier for differential-to-single-ended conversion. The PGA848 is equipped with eight decade (scope) gain settings, from an attenuating gain of 0.5V/V to a maximum of 100V/V. Gain is set using three digital gain selection pins.

The PGA848 architecture is optimized to drive inputs of high-resolution, precision analog-to-digital converters (ADCs) with sampling rates up to 1MSPS without additional ADC drivers. The output-stage power supplies are decoupled from the input stage to protect the ADC or downstream devices against overdrive damage.

The super-beta input transistors offer an impressively low input bias current, which in turn provides a very low input current noise density of 0.3pA/√Hz. This capability makes the PGA848 a versatile choice for virtually any sensor type. The low-noise current-feedback front-end architecture offers exceptional gain flatness even at high frequencies, making the PGA848 an excellent high-impedance sensor readout device. Integrated protection circuitry on the input pins handles overvoltages of up to ±40V beyond the power-supply voltages.

The PGA848 is a wide-bandwidth, low-noise programmable gain instrumentation amplifier for differential-to-single-ended conversion. The PGA848 is equipped with eight decade (scope) gain settings, from an attenuating gain of 0.5V/V to a maximum of 100V/V. Gain is set using three digital gain selection pins.

The PGA848 architecture is optimized to drive inputs of high-resolution, precision analog-to-digital converters (ADCs) with sampling rates up to 1MSPS without additional ADC drivers. The output-stage power supplies are decoupled from the input stage to protect the ADC or downstream devices against overdrive damage.

The super-beta input transistors offer an impressively low input bias current, which in turn provides a very low input current noise density of 0.3pA/√Hz. This capability makes the PGA848 a versatile choice for virtually any sensor type. The low-noise current-feedback front-end architecture offers exceptional gain flatness even at high frequencies, making the PGA848 an excellent high-impedance sensor readout device. Integrated protection circuitry on the input pins handles overvoltages of up to ±40V beyond the power-supply voltages.

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* Data sheet PGA848 Low-Noise, Wide-Bandwidth, Scope Gain, Single-Ended Output, Programmable Gain Instrumentation Amplifier datasheet (Rev. A) PDF | HTML 2025年 12月 5日

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