LP2996-N
- Minimum VDDQ:
- 1.8 V (LP2996-N)
- 1.35 V (LP2996A)
- Source and Sink Current
- Low Output Voltage Offset
- No External Resistors Required for Setting Output Voltage
- Linear Topology
- Suspend to Ram (STR) Functionality
- Stable With Ceramic Capacitors With Appropriate ESR
- Low External Component Count
- Thermal Shutdown
The LP2996-N and LP2996A linear regulators are designed to meet the JEDEC SSTL-2 specifications for termination of DDR-SDRAM. The device also supports DDR2, while LP2996A supports DDR3 and DDR3L VTT bus termination with VDDQ minimum of 1.35 V. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 1.5-A continuous current and transient peaks up to 3 A in the application as required for DDR-SDRAM termination. The LP2996-N and LP2996A also incorporate a VSENSE pin to provide superior load regulation and a VREF output as a reference for the chipset and DIMMs.
An additional feature found on the LP2996-N and LP2996A is an active-low shutdown (SD) pin that provides Suspend To RAM (STR) functionality. When SD is pulled low the VTT output will tri-state providing a high impedance output, but VREF remains active. A power savings advantage can be obtained in this mode through lower quiescent current.
TI recommends the LP2998 and LP2998-Q1 devices for automotive applications and DDR applications that require operating at temperatures below zero.
WEBENCH® design tools can be used by application designers to generate, optimize, and simlulate applications using the LP2998 and LP2998-Q1.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | LP2996/LP2996A DDR Termination Regulator datasheet (Rev. K) | PDF | HTML | 2016/12/23 | ||
| 應用說明 | Limiting DDR Termination Regulators’ Inrush Current | 2016/8/23 |
設計與開發
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LP2996LQEVAL — DDR 終端穩壓器
The LP2996 evaluation board is designed to provide the design engineer with a fully functional prototype system in which to evaluate the LP2996 in both a static environment and with a complete memory system. There are two versions of the board, and while identical in functionality they differ in (...)
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SOIC (D) | 8 | Ultra Librarian |
| WQFN (NHP) | 16 | Ultra Librarian |
| HSOIC (DDA) | 8 | Ultra Librarian |
訂購與品質
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