產品詳細資料

Number of channels 4 Rating Catalog Forward/reverse channels 2 forward / 2 reverse Integrated isolated power No Isolation rating Reinforced Default output High, Low Data rate (max) (Mbps) 100 Protocols General purpose, SPI, UART Surge isolation voltage (VIOSM) (VPK) 12800 Transient isolation voltage (VIOTM) (VPK) 8000 Withstand isolation voltage (VISO) (Vrms) 5700 CMTI (min) (V/µs) 85000 Operating temperature range (°C) -55 to 125 Supply voltage (max) (V) 5.5 Supply voltage (min) (V) 2.25 Propagation delay time (typ) (µs) 0.0107 Current consumption per channel (DC) (typ) (mA) 1 Current consumption per channel (1 Mbps) (typ) (mA) 1.65 Creepage (min) (mm) 8, 14.5 Clearance (min) (mm) 8, 14.5
Number of channels 4 Rating Catalog Forward/reverse channels 2 forward / 2 reverse Integrated isolated power No Isolation rating Reinforced Default output High, Low Data rate (max) (Mbps) 100 Protocols General purpose, SPI, UART Surge isolation voltage (VIOSM) (VPK) 12800 Transient isolation voltage (VIOTM) (VPK) 8000 Withstand isolation voltage (VISO) (Vrms) 5700 CMTI (min) (V/µs) 85000 Operating temperature range (°C) -55 to 125 Supply voltage (max) (V) 5.5 Supply voltage (min) (V) 2.25 Propagation delay time (typ) (µs) 0.0107 Current consumption per channel (DC) (typ) (mA) 1 Current consumption per channel (1 Mbps) (typ) (mA) 1.65 Creepage (min) (mm) 8, 14.5 Clearance (min) (mm) 8, 14.5
SOIC (DW) 16 106.09 mm² 10.3 x 10.3 SOIC (DWW) 16 177.675 mm² 10.3 x 17.25
  • Signaling Rate: Up to 100Mbps
  • Wide Supply Range: 2.25V to 5.5V
  • 2.25V to 5.5V Level Translation
  • Wide Temperature Range: –55°C to 125°C
  • Low-Power Consumption, Typical 1.7mA per Channel at 1Mbps
  • Low Propagation Delay: 11ns Typical (5V Supplies)
  • Industry leading CMTI (Min): ±100kV/µs
  • Robust Electromagnetic Compatibility (EMC)
  • System-Level ESD, EFT, and Surge Immunity
  • Low Emissions
  • Isolation Barrier Life: >40 Years
  • Wide Body SOIC-16 Package and Extra-Wide Body SOIC-16 Package Options
  • Safety and Regulatory Approvals:
    • 8000VPK Reinforced Isolation per DIN EN IEC 60747-17 (VDE 0884-17)
    • 5.7kVRMS Isolation for 1 Minute per UL 1577
    • IEC 61010-1, IEC 62368-1, IEC 60601-1, and GB 4943.1 certifications

  • Signaling Rate: Up to 100Mbps
  • Wide Supply Range: 2.25V to 5.5V
  • 2.25V to 5.5V Level Translation
  • Wide Temperature Range: –55°C to 125°C
  • Low-Power Consumption, Typical 1.7mA per Channel at 1Mbps
  • Low Propagation Delay: 11ns Typical (5V Supplies)
  • Industry leading CMTI (Min): ±100kV/µs
  • Robust Electromagnetic Compatibility (EMC)
  • System-Level ESD, EFT, and Surge Immunity
  • Low Emissions
  • Isolation Barrier Life: >40 Years
  • Wide Body SOIC-16 Package and Extra-Wide Body SOIC-16 Package Options
  • Safety and Regulatory Approvals:
    • 8000VPK Reinforced Isolation per DIN EN IEC 60747-17 (VDE 0884-17)
    • 5.7kVRMS Isolation for 1 Minute per UL 1577
    • IEC 61010-1, IEC 62368-1, IEC 60601-1, and GB 4943.1 certifications

The ISO7842x device is a high-performance, quad-channel digital isolator with a 8000VPK isolation voltage. This device has reinforced isolation certifications according to VDE, CSA, CQC, and TUV. The isolator provides high electromagnetic immunity and low emissions at low-power consumption while isolating CMOS or LVCMOS digital I/Os. Each isolation channel has a logic input and output buffer separated by a silicon-dioxide (SiO2) insulation barrier.

This device comes with enable pins that can be used to put the respective outputs in high impedance for multi-controller driving applications and to reduce power consumption. The ISO7842 device has two forward and two reverse-direction channels. If the input power or signal is lost, the default output is high for the ISO7842 device and low for the ISO7842F device. See the Device Functional Modes section for further details.

Used in conjunction with isolated power supplies, this device helps prevent noise currents on a data bus or other circuits from entering the local ground and interfering with or damaging sensitive circuitry. Through remarkable chip design and layout techniques, electromagnetic compatibility of the ISO7842 device has been significantly enhanced to ease system-level ESD, EFT, surge, and emissions compliance.

The ISO7842 device is available in 16-pin SOIC wide-body (DW) and extra-wide body (DWW) packages.

The ISO7842x device is a high-performance, quad-channel digital isolator with a 8000VPK isolation voltage. This device has reinforced isolation certifications according to VDE, CSA, CQC, and TUV. The isolator provides high electromagnetic immunity and low emissions at low-power consumption while isolating CMOS or LVCMOS digital I/Os. Each isolation channel has a logic input and output buffer separated by a silicon-dioxide (SiO2) insulation barrier.

This device comes with enable pins that can be used to put the respective outputs in high impedance for multi-controller driving applications and to reduce power consumption. The ISO7842 device has two forward and two reverse-direction channels. If the input power or signal is lost, the default output is high for the ISO7842 device and low for the ISO7842F device. See the Device Functional Modes section for further details.

Used in conjunction with isolated power supplies, this device helps prevent noise currents on a data bus or other circuits from entering the local ground and interfering with or damaging sensitive circuitry. Through remarkable chip design and layout techniques, electromagnetic compatibility of the ISO7842 device has been significantly enhanced to ease system-level ESD, EFT, surge, and emissions compliance.

The ISO7842 device is available in 16-pin SOIC wide-body (DW) and extra-wide body (DWW) packages.

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類型 標題 日期
* Data sheet ISO7842x High-Performance, 8000VPK Reinforced Quad-Channel Digital Isolator datasheet (Rev. I) PDF | HTML 2025年 7月 29日
White paper Improve Your System Performance by Replacing Optocouplers with Digital Isolators (Rev. D) PDF | HTML 2025年 11月 7日
Certificate VDE Certificate for Reinforced Isolation for DIN EN IEC 60747-17 (Rev. Y) 2025年 9月 22日
Certificate UL Certificate of Compliance File E181974 Vol 4 Sec 6 (Rev. R) 2025年 9月 8日
Certificate CQC Certificate for ISOxxDWx (Rev. K) 2025年 8月 18日
Certificate TUV Certificate for Isolation Devices (Rev. L) 2025年 8月 15日
Application note Digital Isolator Design Guide (Rev. G) PDF | HTML 2023年 9月 13日
White paper Circuit Board Insulation Design According to IEC60664 for Motor Drive Apps PDF | HTML 2023年 8月 31日
Certificate CSA Certificate for ISO78xxDWx 2023年 3月 13日
White paper Why are Digital Isolators Certified to Meet Electrical Equipment Standards? 2021年 11月 16日
White paper Distance Through Insulation: How Digital Isolators Meet Certification Requiremen PDF | HTML 2021年 6月 11日
Functional safety information Isolation in AC Motor Drives: Understanding the IEC 61800-5-1 Safety Standard (Rev. A) 2019年 9月 19日
Analog Design Journal Pushing the envelope with high-performance digital-isolation technology (Rev. A) 2018年 8月 22日
Application brief Considerations for Selecting Digital Isolators 2018年 7月 24日
Functional safety information Isolation in solar power converters: Understanding the IEC62109-1 safety standar (Rev. A) 2018年 5月 18日
Analog Design Journal How to reduce radiated emissions of digital isolators for systems with RF module 2018年 3月 26日
Application note Isolation Glossary (Rev. A) 2017年 9月 19日
Analog Design Journal 4Q 2015 Analog Applications Journal 2015年 10月 30日
White paper Understanding electromagnetic compliance tests in digital isolators 2014年 10月 17日
White paper High-voltage reinforced isolation: Definitions and test methodologies 2014年 10月 16日

設計與開發

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開發板

DIGI-ISO-EVM — 通用數位隔離器評估模組

DIGI-ISO-EVM 是一款評估模組 (EVM),可評估任何 TI 單通道、雙通道、三通道、四通道或六通道數位隔離器裝置,並提供五種不同封裝 - 8 接腳窄體 SOIC (D)、8 接腳寬體 SOIC (DWV)、16 接腳寬體 SOIC (DWW)、16 接腳超寬體 SOIC (DWW) 和 16 接腳 (DBQ) 封裝。EVM 具備足夠 Berg 接腳選項,可用於評估具最少外部零組件的裝置。

使用指南: PDF | HTML
TI.com 無法提供
開發板

ISO7842-EVM — 高抗擾度、5.7kVRMS 強化四通道 2/2 數位隔離器評估模組

The ISO7842 provides galvanic isolation up to 5700 VRMS for 1 minute per UL and 8000 VPK per VDE. This device has four isolated channels comprised of a logic input and output buffer separated by a silicon dioxide (SiO2) insulation barrier. Used in conjunction with isolated power supplies, this (...)

使用指南: PDF
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模擬型號

ISO7842 IBIS Model (Rev. A)

SLLM263A.ZIP (52 KB) - IBIS Model
模擬型號

ISO7842F IBIS Model (Rev. A)

SLLM278A.ZIP (52 KB) - IBIS Model
參考設計

TIDA-00420 — ADC 架構、數位隔離、廣泛輸入、16 通道、AC/DC 二進位輸入參考設計

此參考設計展現具強化型隔離的成本最佳化、可擴充 ADC 架構 AC/DC 二進位輸入模組 (BIM) 架構。10 位元或 12 位元 SAR ADC 的 16 通道,用於感測多個二進位輸入。運算放大器除了維持低每頻道成本外,也可為各輸入提供最佳訊號調節。數位隔離器 (基本型或強化型) 可用於隔離主機 MCU 或處理器。提供可測量溫度,濕度和磁場以進行診斷的設備。具可配置輸出的強化型隔離 DC/DC 電源供應器,可提供二進位模組所需的電源。
Design guide: PDF
電路圖: PDF
參考設計

TIDA-00267 — 極性修正隔離式 CAN 參考設計

A ready to use design that efficiently solves the problem of improper installation by adding antiparallel communication channels and appropriate control signal to enable polarity correction for the Controller Area Network (CAN) bus.
電路圖: PDF
參考設計

TIDA-01037 — 可實現最大 SNR 和取樣率的 20 位元 1 MSPS 隔離器最佳化資料採集參考設計

TIDA-01037 為 20 位元、1MSPS 隔離式類比輸入資料擷取參考設計,運用兩種不同的隔離器裝置,以最大化訊號鏈 SNR 和取樣率性能。針對需要低抖動的訊號,例如 ADC 取樣時脈,則使用 TI 的 ISO73xx 系列低抖動裝置,而 TI 的高速 ISO78xx 系列裝置則可用於最大化資料取樣率。將這兩個隔離器解決方案結合在一起,將跨隔離邊界的取樣時脈抖動降到最低,即可大幅提升高頻性能,並將隔離器訊號速率最大化,進而提升資料輸送量。運用 TI 進階 ADC multiSPITM 和來源同步功能,可實現其他改良。最後描述所有關鍵設計理論,並呈現測量結果。
Design guide: PDF
電路圖: PDF
參考設計

TIDA-01590 — 適用於太陽能匯流箱的 1200V 隔離式 I2C 高壓側電流感測參考設計

此參考設計是一種隔離式高壓側電流感測設計,適用於接地或未接地系統中的智慧型匯流箱。電流感測拓撲結構可為高達 1,200VDC 的高電壓系統實現多通道、誤差在 ±1% 以內的隔離式電流感測,但會受限於 DC/DC 變壓器。
Design guide: PDF
電路圖: PDF
參考設計

TIDA-01035 — 最佳化抖動以實現最大 SNR 和取樣率的 20 位元隔離式資料採集參考設計

TIDA-01035 是 20 位元、1MSPS 隔離式類比輸入資料採集參考設計,展示如何解決數位隔離式資料擷取系統典型的性能挑戰,並將其最佳化。
  • 透過有效降低隔離邊界中 ADC 取樣時脈抖動,大幅提升高頻 AC 訊號鏈性能(SNR 與 THD)
  • 免除數位隔離器帶來的傳播延遲,或是將其降到最低,就能充分提高取樣率
  • 使用跨接器,提供是否使用抖動抑制技術來評估性能的選項
  • 包含詳細的時序分析、詳細說明隔離器的附加抖動對資料輸送量的影響
Design guide: PDF
電路圖: PDF
參考設計

TIDA-00732 — 可實現最大 SNR 和採樣率的 18 位元 2 MSPS 隔離式資料採集參考設計

本「可實現最大 SNR 和取樣率的 18 位元、2Msps 隔離式資料採集參考設計」說明如何克服隔離式資料擷取系統設計中典型的性能限制挑戰:
  • 透過將數位隔離器帶來的傳播延遲降到最低,將取樣率最大化
  • 透過有效緩解數位隔離器所帶來的 ADC 取樣時脈抖動,將高頻率 AC 訊號鏈性能 (SNR) 最大化
Design guide: PDF
電路圖: PDF
參考設計

TIDA-00448 — 具有強化數位隔離器的彈性高電流 IGBT 閘極驅動器參考設計

The TIDA-00448 reference design is an isolated IGBT gate driver with bipolar gate voltages intended for driving  high power IGBT’s requiring high peak gate current up to 40 A. TI’s NexFET power blocks which scales in this range, with same package, enables single design to be used (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-00330 — 強化隔離式 M-LVDS 收發器參考設計

This reference design demonstrates the performance of a reinforced, isolated, full-duplex M-LVDS transceiver node using the ISO7842 and SN65MLVD203. A single reinforced digital isolator replaces two basic digital isolators, reducing cost and PCB area.
Design guide: PDF
電路圖: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOIC (DW) 16 Ultra Librarian
SOIC (DWW) 16 Ultra Librarian

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